Re: [PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC
From: Jie Gan
Date: Thu Jul 23 2026 - 04:22:04 EST
On 7/23/2026 9:46 AM, Jie Gan wrote:
This series adds the CoreSight debug and trace subsystem for the
Qualcomm Shikra SoC.
The first patch adds a fallback compatible for the Shikra CTCU (CoreSight
Trace Control Unit). The CTCU on Shikra shares the same configuration as
the one on SA8775p, so "qcom,shikra-ctcu" falls back to the existing
"qcom,sa8775p-ctcu" compatible.
The second patch adds the DT nodes describing the CoreSight topology on
Shikra, including the funnels, replicators, TMC sinks (ETR/ETF), STM,
per-core ETMs, CTIs, and the TPDM/TPDA trace collection blocks, along
with the CTCU and the dummy source/sink endpoints that model external
trace sources and the EUD sink.
I just found the version number is wrong for the series, it should be V4.
I have checked my b4 branch, confirmed the version number has been cleared by mistake. Will take care of it in the future.
Thanks,
Jie
---
Changes in V4:
- fix the wrong subject for the dt-binding patch
- Link to v3: https://lore.kernel.org/all/20260722-add-coresight-nodes-for-shikra-v3-0-1400a3454e9f@xxxxxxxxxxxxxxxx/
Changes in v3:
- add correct subsystem prefix in dt-binding subject.
- Link to v2: https://lore.kernel.org/r/20260715-add-coresight-nodes-for-shikra-v2-0-ebd485e39a51@xxxxxxxxxxxxxxxx
Changes in v2:
- remove MMIO for the ETM devices.
- Link to v1: https://lore.kernel.org/r/20260714-add-coresight-nodes-for-shikra-v1-0-b1cf85962455@xxxxxxxxxxxxxxxx
To: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
To: Mike Leach <mike.leach@xxxxxxx>
To: James Clark <james.clark@xxxxxxxxxx>
To: Leo Yan <leo.yan@xxxxxxx>
To: Rob Herring <robh@xxxxxxxxxx>
To: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
To: Conor Dooley <conor+dt@xxxxxxxxxx>
To: Tingwei Zhang <tingwei.zhang@xxxxxxxxxxxxxxxx>
To: Yuanfang Zhang <yuanfang.zhang@xxxxxxxxxxxxxxxx>
To: Mao Jinlong <jinlong.mao@xxxxxxxxxxxxxxxx>
To: Bjorn Andersson <andersson@xxxxxxxxxx>
To: Konrad Dybcio <konradybcio@xxxxxxxxxx>
To: Paul Walmsley <pjw@xxxxxxxxxx>
To: Palmer Dabbelt <palmer@xxxxxxxxxxx>
To: Albert Ou <aou@xxxxxxxxxxxxxxxxx>
To: Alexandre Ghiti <alex@xxxxxxxx>
Cc: coresight@xxxxxxxxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: linux-arm-msm@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx
Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
---
Jie Gan (2):
dt-bindings: arm: qcom,coresight-ctcu: Add Shikra
arm64: dts: qcom: shikra: Add coresight nodes
.../bindings/arm/qcom,coresight-ctcu.yaml | 1 +
arch/arm64/boot/dts/qcom/shikra.dtsi | 1295 ++++++++++++++++++++
2 files changed, 1296 insertions(+)
---
base-commit: 290aaf24a551d5a0dce037e3fab30820f9113a10
change-id: 20260722-add-coresight-nodes-for-shikra-5fb8a4b503d1
Best regards,