Re: [PATCH v12 4/4] dt-bindings: timer: dwc: Update resets property items

From: Krzysztof Kozlowski

Date: Fri Jul 24 2026 - 01:55:27 EST


On Tue, Jul 21, 2026 at 08:09:35PM +0800, dongxuyang@xxxxxxxxxxxxxxxxxx wrote:
> From: Xuyang Dong <dongxuyang@xxxxxxxxxxxxxxxxxx>
>
> The DesignWare DW_apb_timers IP has two active-low reset inputs:
> presetn resets the register interface logic in the pclk (bus) domain,
> and timer_N_resetn resets the counter/timer logic in the timer_N_clk
> domain. The existing snps,dw-apb-timer binding only describes one.
>
> Update snps,dw-apb-timer binding to allow up to two reset lines,
> matching the hardware capabilities of the DesignWare IP family.
>
> Signed-off-by: Xuyang Dong <dongxuyang@xxxxxxxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/timer/snps,dw-apb-timer.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>

Best regards,
Krzysztof