[PATCH v4 2/3] arm64: dts: qcom: ipq5210: Introduce RDP504 common DT file
From: Varadarajan Narayanan
Date: Fri Jul 24 2026 - 06:03:50 EST
RDP504 has USB, PCIe and SPI NAND devices populated. EMMC and NAND
share the GPIOs. The board has to be reworked to change from EMMC
to NAND variant. Rename ipq5210-rdp504.dts as ipq5210-rdp504-common.dtsi
and include it in variant specific DTS file.
Describe the fixed USB regulators, PCIe reset GPIOs, QPIC SPI NAND flash
and required pinctrl states. Enable QPIC BAM, USB and PCIe for the board.
Remove ipq5210-rdp504.dtb from Makefile to avoid build break.
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/Makefile | 1 -
.../arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi | 209 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts | 79 --------
3 files changed, 209 insertions(+), 80 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index e05414290d8e..88c898d8ac3b 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -25,7 +25,6 @@ dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk-el2.dtb
dtb-$(CONFIG_ARCH_QCOM) += hamoa-lenovo-ideacentre-mini-01q8x10.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb
-dtb-$(CONFIG_ARCH_QCOM) += ipq5210-rdp504.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp441.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp442.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp468.dtb
diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi
new file mode 100644
index 000000000000..30c8560822b5
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "ipq5210.dtsi"
+
+/ {
+ aliases {
+ serial0 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ vreg_misc_3p3: regulator-usb-3p3 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "usb_hs_vdda_3p3";
+ };
+
+ vreg_misc_1p8: regulator-usb-1p8 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "vdda_1p8_usb";
+ };
+
+ vreg_misc_0p925: regulator-usb-0p925 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <925000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "vdd_core_usb";
+ };
+};
+
+&pcie0 {
+ pinctrl-0 = <&pcie0_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie0_phy {
+ status = "okay";
+};
+
+&pcie0_port0 {
+ reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
+};
+
+&pcie1 {
+ pinctrl-0 = <&pcie1_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ status = "okay";
+};
+
+&pcie1_port0 {
+ reset-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ pinctrl-0 = <&qpic_snand_default_state>;
+ pinctrl-names = "default";
+
+ flash@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-engine = <&qpic_nand>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ };
+};
+
+&qusb_phy_0 {
+ vdd-supply = <&vreg_misc_0p925>;
+ vdda-pll-supply = <&vreg_misc_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_misc_3p3>;
+
+ status = "okay";
+};
+
+&sdhc {
+ max-frequency = <192000000>;
+ bus-width = <4>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-0 = <&sdhc_default_state>;
+ pinctrl-names = "default";
+};
+
+&sleep_clk {
+ clock-frequency = <32000>;
+};
+
+&ssphy_0 {
+ vdda-pll-supply = <&vreg_misc_1p8>;
+ vdda-phy-supply = <&vreg_misc_0p925>;
+
+ status = "okay";
+};
+
+&tlmm {
+ pcie1_default_state: pcie1-default-state {
+ pins = "gpio29";
+ function = "gpio";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+
+ pcie0_default_state: pcie0-default-state {
+ pins = "gpio32";
+ function = "gpio";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+
+ qpic_snand_default_state: qpic-snand-default-state {
+ data-pins {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ function = "qspi_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cs-pins {
+ pins = "gpio4";
+ function = "qspi_cs_n";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ clock-pins {
+ pins = "gpio5";
+ function = "qspi_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ qup_uart1_default_state: qup-uart1-default-state {
+ pins = "gpio38", "gpio39";
+ function = "qup_se1";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+
+ sdhc_default_state: sdhc-default-state {
+ data-pins {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ function = "sdc_data";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ cmd-pins {
+ pins = "gpio4";
+ function = "sdc_cmd";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ clk-pins {
+ pins = "gpio5";
+ function = "sdc_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+};
+
+&uart1 {
+ pinctrl-0 = <&qup_uart1_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&usb3 {
+ dr_mode = "host";
+
+ status = "okay";
+};
+
+&xo_board {
+ clock-frequency = <24000000>;
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts b/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts
deleted file mode 100644
index 941f866ecfe9..000000000000
--- a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts
+++ /dev/null
@@ -1,79 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-/*
- * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
- */
-
-/dts-v1/;
-
-#include "ipq5210.dtsi"
-
-/ {
- model = "Qualcomm Technologies, Inc. IPQ5210 RDP504";
- compatible = "qcom,ipq5210-rdp504", "qcom,ipq5210";
-
- aliases {
- serial0 = &uart1;
- };
-
- chosen {
- stdout-path = "serial0";
- };
-};
-
-&sdhc {
- max-frequency = <192000000>;
- bus-width = <4>;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- pinctrl-0 = <&sdhc_default_state>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&sleep_clk {
- clock-frequency = <32000>;
-};
-
-&tlmm {
- qup_uart1_default_state: qup-uart1-default-state {
- pins = "gpio38", "gpio39";
- function = "qup_se1";
- drive-strength = <6>;
- bias-pull-down;
- };
-
- sdhc_default_state: sdhc-default-state {
- clk-pins {
- pins = "gpio5";
- function = "sdc_clk";
- drive-strength = <8>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio4";
- function = "sdc_cmd";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "sdc_data";
- drive-strength = <8>;
- bias-pull-up;
- };
- };
-};
-
-&uart1 {
- pinctrl-0 = <&qup_uart1_default_state>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&xo_board {
- clock-frequency = <24000000>;
-};
--
2.34.1