[PATCH RESEND 01/17] dt-bindings: display: spacemit: add K3 Saturn DPU controller

From: Cody Kang via B4 Relay

Date: Sat Jul 25 2026 - 00:52:10 EST


From: Cody Kang <codykang.hk@xxxxxxxxx>

Document the Saturn display processing unit found on the SpacemiT K3 SoC.
The K3 instantiates two of them, one per display path. They share a
compatible: an instance differs only in which register window, interrupt,
clock and reset lines it takes.

Signed-off-by: Cody Kang <codykang.hk@xxxxxxxxx>
---
.../display/spacemit/spacemit,k3-saturn-dpu.yaml | 132 +++++++++++++++++++++
1 file changed, 132 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-saturn-dpu.yaml b/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-saturn-dpu.yaml
new file mode 100644
index 000000000000..97ea9da4b68e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-saturn-dpu.yaml
@@ -0,0 +1,132 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/spacemit/spacemit,k3-saturn-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K3 Saturn Display Processing Unit
+
+maintainers:
+ - Cody Kang <codykang.hk@xxxxxxxxx>
+
+description:
+ The Saturn DPU is the display processing unit of the SpacemiT K3 SoC. It
+ composes the display planes and drives the timing for one display path. Its
+ output goes to a DisplayPort or embedded DisplayPort controller. The K3 has
+ two instances.
+
+properties:
+ compatible:
+ const: spacemit,k3-saturn-dpu
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Online (live display) compose path.
+ - description: Offline (writeback) compose path.
+
+ interrupt-names:
+ items:
+ - const: online
+ - const: offline
+
+ clocks:
+ items:
+ - description: Pixel clock.
+ - description: Memory clock for the compose pipeline.
+ - description: AXI bus clock.
+ - description: DSI escape clock.
+ - description: DSC clock.
+
+ clock-names:
+ items:
+ - const: pxclk
+ - const: mclk
+ - const: aclk
+ - const: escclk
+ - const: dscclk
+
+ resets:
+ items:
+ - description: Memory clock domain.
+ - description: LCD domain, shared with the downstream controller.
+ - description: DSI escape clock domain.
+ - description: AXI clock domain.
+ - description: DSC domain.
+
+ reset-names:
+ items:
+ - const: mclk
+ - const: lcd
+ - const: esc
+ - const: aclk
+ - const: dsc
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video output to the DisplayPort or eDP controller.
+
+ required:
+ - port@0
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/spacemit,k3-clocks.h>
+ #include <dt-bindings/reset/spacemit,k3-resets.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dpu@c0340000 {
+ compatible = "spacemit,k3-saturn-dpu";
+ reg = <0x0 0xc0340000 0x0 0x54000>;
+ interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
+ <89 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "online", "offline";
+ clocks = <&syscon_apmu CLK_APMU_LCD_PXCLK>,
+ <&syscon_apmu CLK_APMU_LCD_MCLK>,
+ <&syscon_apmu CLK_APMU_DPU_ACLK>,
+ <&syscon_apmu CLK_APMU_DSI_ESC>,
+ <&syscon_apmu CLK_APMU_LCD_DSC>;
+ clock-names = "pxclk", "mclk", "aclk", "escclk", "dscclk";
+ resets = <&syscon_apmu RESET_APMU_LCD_MCLK>,
+ <&syscon_apmu RESET_APMU_LCD>,
+ <&syscon_apmu RESET_APMU_DSI_ESC>,
+ <&syscon_apmu RESET_APMU_DPU_ACLK>,
+ <&syscon_apmu RESET_APMU_LCD_DSCCLK>;
+ reset-names = "mclk", "lcd", "esc", "aclk", "dsc";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&edp0_in>;
+ };
+ };
+ };
+ };
+ };

--
2.43.0