[PATCH rdma-next v2 1/2] net/mlx5: Add qp_latency_sensitive_disable cap bit
From: Edward Srouji
Date: Sun Jul 26 2026 - 05:11:40 EST
From: Michael Guralnik <michaelgur@xxxxxxxxxx>
Introduce the qp_latency_sensitive_disable capability bit to indicate
that the device no longer implements a separate class for
latency-sensitive QPs, so drivers can stop programming the
latency_sensitive QPC field and skip allocating the dedicated
fast-path bfreg on such HW.
Signed-off-by: Michael Guralnik <michaelgur@xxxxxxxxxx>
Reviewed-by: Patrisious Haddad <phaddad@xxxxxxxxxx>
Signed-off-by: Edward Srouji <edwards@xxxxxxxxxx>
---
include/linux/mlx5/mlx5_ifc.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 695c86ee6d7a3f15945fe7af092f63d9121da47a..28582c4d94d4335283009595f6a278c4d17c7eaa 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -2005,7 +2005,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 log_max_stride_sz_rq[0x5];
u8 reserved_at_3a8[0x3];
u8 log_min_stride_sz_rq[0x5];
- u8 reserved_at_3b0[0x3];
+ u8 reserved_at_3b0[0x2];
+ u8 qp_latency_sensitive_disable[0x1];
u8 log_max_stride_sz_sq[0x5];
u8 reserved_at_3b8[0x3];
u8 log_min_stride_sz_sq[0x5];
--
2.49.0