[PATCH 9/9] ARM: stm32: document STM32H7R7 support
From: Liu Changjie
Date: Sun Jul 26 2026 - 12:13:18 EST
Describe the STM32H7R7 features and note the ART-Pi2 as the currently
supported development board.
Signed-off-by: Liu Changjie <liucj1228@xxxxxxxxxxx>
---
Documentation/arch/arm/index.rst | 1 +
.../arch/arm/stm32/stm32h7r7-overview.rst | 28 +++++++++++++++++++
2 files changed, 29 insertions(+)
create mode 100644 Documentation/arch/arm/stm32/stm32h7r7-overview.rst
diff --git a/Documentation/arch/arm/index.rst b/Documentation/arch/arm/index.rst
index b15621093..1e33535e5 100644
--- a/Documentation/arch/arm/index.rst
+++ b/Documentation/arch/arm/index.rst
@@ -55,6 +55,7 @@ SoC-specific documents
stm32/overview
stm32/stm32h743-overview
stm32/stm32h750-overview
+ stm32/stm32h7r7-overview
stm32/stm32f769-overview
stm32/stm32f429-overview
stm32/stm32mp13-overview
diff --git a/Documentation/arch/arm/stm32/stm32h7r7-overview.rst b/Documentation/arch/arm/stm32/stm32h7r7-overview.rst
new file mode 100644
index 000000000..7856b4319
--- /dev/null
+++ b/Documentation/arch/arm/stm32/stm32h7r7-overview.rst
@@ -0,0 +1,28 @@
+==================
+STM32H7R7 Overview
+==================
+
+Introduction
+------------
+
+The STM32H7R7 is a Cortex-M7 microcontroller running at up to 600 MHz. It
+features:
+
+- 64 Kbytes of user boot flash and 620 Kbytes of internal SRAM
+- 32 Kbytes of instruction cache and 32 Kbytes of data cache
+- Two serial xSPI interfaces and an FMC parallel memory interface
+- SD/MMC, Ethernet, USB and FD-CAN controllers
+- I2C, SPI, I3C and serial interfaces
+- NeoChrom graphics accelerator, JPEG codec and LCD-TFT controller
+
+The RT-Thread ART-Pi2 development board is supported.
+
+Resources
+---------
+
+Datasheet and reference manual are publicly available on the STMicroelectronics
+website (STM32H7R7_).
+
+.. _STM32H7R7: https://www.st.com/en/microcontrollers-microprocessors/stm32h7r7-7s7.html
+
+:Authors: Liu Changjie <liucj1228@xxxxxxxxxxx>
--
2.55.0