[tip: x86/cpu] x86/cpu/transmeta: Rescan CPUID(0x1) after modifying capabilities

[tip-bot2 for Ahmed S. Darwish]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     bec89bf9eacbfdcaead88e9a611215fcad3c5cf4
Gitweb:        https://git.kernel.org/tip/bec89bf9eacbfdcaead88e9a611215fcad3c5cf4
Author:        Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
AuthorDate:    Thu, 28 May 2026 17:37:30 +02:00
Committer:     Borislav Petkov (AMD) <bp@xxxxxxxxx>
CommitterDate: Mon, 27 Jul 2026 19:43:41 -07:00

x86/cpu/transmeta: Rescan CPUID(0x1) after modifying capabilities

Transmeta CPUs allow masking CPUID(0x1).EDX feature flags via MSR writes.  If
a bit is cleared in the 0x80860004 MSR, its corresponding feature flag is not
reported by CPUID.

Refresh the CPUID parser's CPUID(0x1) cache after all MSR bits are unmasked.

Note, the MSR 0x80860004 semantics are documented in the "BIOS Programmer's
Guide: Transmeta Crusoe Processor" document, dated June 14, 2002.

Signed-off-by: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
Link: https://patch.msgid.link/20260528153923.403473-9-darwi@xxxxxxxxxxxxx
---
 arch/x86/kernel/cpu/transmeta.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 1fdcd69..d9e0edb 100644
--- a/arch/x86/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
@@ -88,6 +88,7 @@ static void init_transmeta(struct cpuinfo_x86 *c)
 	/* Unhide possibly hidden capability flags */
 	rdmsr(0x80860004, cap_mask, uk);
 	wrmsr(0x80860004, ~0, uk);
+	cpuid_refresh_leaf(c, 0x1);
 	c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
 	wrmsr(0x80860004, cap_mask, uk);