Re: [PATCH net-next] net: stmmac: dwxgmac2: configure INTM for per-channel interrupt routing

[Zxyan Zhu]

On Mon, 27 Jul 2026 18:16:17 -0700 Jakub Kicinski wrote:
> On Thu, 23 Jul 2026 15:50:50 +0200 Maxime Chevallier wrote:
> > Same logic as in dwmac4, this looks good to me,
> 
> Is this a fix tho? The commit message reads like DMA irqs are
> completely ignored. But neither this commit nor 6ccf12ae111e
> really explain much to an outsider..

Thanks for the review.

The commit message does a poor job of explaining the actual impact,
so let me clarify.

I've verified on hardware with XGMAC and multi-MSI enabled. The
results are definitive:

  INTM=00 (default):
    - 5.4 million interrupts on the common IRQ line in 3 seconds
    - ~1.8 million IRQ_NONE returns per second

  INTM=01:
    - 0 interrupts on the common IRQ line
    - Per-channel IRQs work normally
    - 10G line rate works correctly

The behavior is that with INTM=00, sbd_intr_o is also asserted for
each DMA completion event. The common IRQ handler
stmmac_mac_interrupt() only processes MAC-layer events (LPI, PMT,
timestamps) and returns IRQ_NONE for DMA completion events, causing
the interrupt storm. With INTM=01, sbd_intr_o is not asserted for
DMA transfer completion events, which is the correct mode for
per-channel interrupt routing.

Regarding net vs net-next: XGMAC multi-MSI has never worked correctly
since it was introduced, so this is not a regression. The same
INTM=1 configuration for GMAC4 was merged via net-next (6ccf12ae111e
"net: stmmac: use interrupt mode INTM=1 for multi-MSI"). I'm leaning
toward net-next for consistency, but since this makes multi-MSI
completely non-functional without it, I'd appreciate your opinion on
whether net is more appropriate.