Re: [PATCH 1/2] riscv: dts: spacemit: Add enough deassert time for the PHY on PICO ITX

[Yixun Lan]

On Fri, 10 Jul 2026 14:33:12 +0800, Inochi Amaoto wrote:
> RTL8211F require at least 50ms deassert to guarantee the register
> access, 10ms is only enough for the PHY reset.

Applied, thanks!

[1/2] riscv: dts: spacemit: Add enough deassert time for the PHY on PICO ITX
      https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=a225e19a4cc4e040ca0389cf0bbe209c23f5c92d
[2/2] riscv: dts: spacemit: Add enough deassert time for the PHY on com260 board
      https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=12b0d602e8642297ec369eeb99366d37c8a3a120

Best regards,
-- 
Yixun Lan <dlan@xxxxxxxxxx>