Re: [PATCH v4 0/5] powervr: MT8173 GPU support

[Chen-Yu Tsai]

On Tue, Jul 28, 2026 at 9:10 PM Brian Masney <bmasney@xxxxxxxxxx> wrote:
>
> Hi Chen-Yu,
>
> On Tue, Jul 28, 2026 at 05:17:58PM +0800, Chen-Yu Tsai wrote:
> > Hi everyone,
> >
> > This is v4 of my MT8173 PowerVR GPU support series.
> >
> > This time around Mesa was ready for basic testing, using both vulkanmark
> > and glmark2-es2-drm (with Zink). Details below.
> >
> > Changes since v3 (all in the clk driver patch):
> > - Changed pm_runtime_put() to pm_runtime_put_sync()
> > - Added missing of_node_put() in remove function
> >
> > Changes since v2 (all in the clk driver patch):
> > - Made COMMON_CLK_MT8173_MFGTOP depend on PM
> >   - Needed since the driver implements PM domains using the generic PM
> >     domain library, which also depends on PM
> >   - Fixes build breakage (kernel test robot)
> > - Fixed "RST_DELAY_CNT" name (Brian)
> > - Dropped unused mfg_desc (Brian)
> > - Added check of clk_prepare_enable()'s return value in
> >   clk_mt8173_mfgtop_power_on() (Brian)
> > - Saved error value for return in IS_ERR(data->clk_26m) branch
> >   (Dan Carpenter / kernel test robot w/ smatch)
> >
> > Changes since v1:
> > - Adapted to changed DT bindings
> > - Dropped driver change
> > - Use same power domain for "a" and "b" GPU power domains
> >
> >
> > This series enables the PowerVR GPU found in the MT8173 SoC, found in
> > some Chromebooks.
>
> I'm making a pull for Stephen for the clk changes. Should patches 1,2,4
> go through the clk tree? Patches 3,5 go through the DRM tree?

Only patches 1 and 2 should go through the clock tree.

Patch 3, 4, 5 can all go through the soc tree if Angelo wants to pick up
DT binding patches. Otherwise I can push patch 3 through drm-misc.


Thanks
ChenYu