Re: [PATCH v7 4/6] arm64: dts: qcom: glymur-crd: Add PHY supplies for pcie3_phy

[Qiang Yu]

On Mon, Jul 27, 2026 at 04:47:15PM +0200, Konrad Dybcio wrote:
> On 7/24/26 12:01 PM, Qiang Yu wrote:
> > CRD wires the shared Gen5x8 PCIe PHY's regulator supplies through
> > board-specific PMIC rails. Add the vdda-phy, vdda-pll, and
> > vdda-refgen0p9/1p2 supplies for &pcie3_phy.
> > 
> > Signed-off-by: Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
> > ---
> >  arch/arm64/boot/dts/qcom/glymur-crd.dts | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > index 6125617de82a..0aae613a33ad 100644
> > --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > @@ -28,3 +28,11 @@ &mdss_dp1 {
> >  &mdss_dp1_out {
> >  	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
> >  };
> > +
> > +&pcie3_phy {
> > +	vdda-phy-supply = <&vreg_l3c_e1_0p89>;
> > +	vdda-pll-supply = <&vreg_l2c_e1_1p14>;
> > +
> > +	vdda-refgen0p9-supply = <&vreg_l1c_e1_0p82>;
> > +	vdda-refgen1p2-supply = <&vreg_l4f_e1_1p08>;
> 
> I'm guessing you also meant to enable it here

No, we need to keep it as disabled because pcie3b is not enabled by
default on glymur crd.

See the fake pcie3b_phy be dropped, it is disabled
https://lore.kernel.org/all/20260420133616.88740-2-krzysztof.kozlowski@xxxxxxxxxxxxxxxx/

- Qiang Yu