RE: [PATCH v2 1/2] dt-bindings: pci: Add CPM6 support to AMD MDB PCIe binding

[Musham, Sai Krishna]

Public

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Sent: Wednesday, July 29, 2026 3:24 PM
> To: Musham, Sai Krishna <sai.krishna.musham@xxxxxxx>;
> bhelgaas@xxxxxxxxxx; lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx;
> mani@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx;
> conor+dt@xxxxxxxxxx; cassel@xxxxxxxxxx
> Cc: linux-pci@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Simek, Michal <michal.simek@xxxxxxx>; Gogada,
> Bharat Kumar <bharat.kumar.gogada@xxxxxxx>; Havalige, Thippeswamy
> <thippeswamy.havalige@xxxxxxx>; Sanwal, Pranav
> <Pranav.sanwal@xxxxxxx>
> Subject: Re: [PATCH v2 1/2] dt-bindings: pci: Add CPM6 support to AMD MDB
> PCIe binding
>
> On 28/07/2026 22:20, Sai Krishna Musham wrote:
> > The AMD CPM6 PCIe controller is based on the Synopsys DesignWare PCIe
> IP.
> > Add "intr" to snps,dw-pcie.yaml vendor-specific reg-names for the
> > per-controller interrupt register region used by CPM6.
> >
> > Update amd,versal2-mdb-host.yaml with separate register definitions:
> > - MDB5: 4 regions (slcr, config, dbi, atu)
> > - CPM6: 5 regions (slcr, config, dbi, atu, intr)
> >
> > Signed-off-by: Sai Krishna Musham <sai.krishna.musham@xxxxxxx>
> > ---
> > Changes in v2:
> > - Update the CPM6 device tree binding and example.
> >
> > v1 https://lore.kernel.org/all/20260402180006.486229-2-
> sai.krishna.musham@xxxxxxx/
> > ---
> >  .../bindings/pci/amd,versal2-mdb-host.yaml    | 111 ++++++++++++++++--
> >  .../devicetree/bindings/pci/snps,dw-pcie.yaml |   2 +
> >  2 files changed, 102 insertions(+), 11 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-
> host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-
> host.yaml
> > index 406c15e1dee1..d22de24b41ca 100644
> > --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> > +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> > @@ -12,24 +12,65 @@ maintainers:
> >  allOf:
> >    - $ref: /schemas/pci/pci-host-bridge.yaml#
> >    - $ref: /schemas/pci/snps,dw-pcie.yaml#
> > +  - if:
>
> Move entire allOf to the end, after required: block.

Thanks for the review, I will move entire allOf block after required.

>
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: amd,versal2-mdb-host
> > +    then:
> > +      properties:
> > +        reg:
> > +          items:
> > +            - description: MDB System Level Control and Status Register (SLCR)
> Base
> > +            - description: configuration region
> > +            - description: data bus interface
> > +            - description: address translation unit register
> > +        reg-names:
> > +          items:
> > +            - const: slcr
> > +            - const: config
> > +            - const: dbi
> > +            - const: atu
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - amd,versal2-cpm6-host
> > +              - amd,versal2-cpm6-host1
> > +    then:
> > +      properties:
> > +        reg:
> > +          minItems: 4
> > +          items:
> > +            - description: MDB System Level Control and Status Register (SLCR)
> Base
> > +            - description: configuration region
> > +            - description: data bus interface
> > +            - description: address translation unit register
> > +            - description: CPM6 PCIe error and event interrupt registers
> > +        reg-names:
> > +          minItems: 4
> > +          items:
> > +            - const: slcr
> > +            - const: config
> > +            - const: dbi
> > +            - const: atu
> > +            - const: intr
> >
> >  properties:
> >    compatible:
> > -    const: amd,versal2-mdb-host
> > +    enum:
> > +      - amd,versal2-mdb-host
> > +      - amd,versal2-cpm6-host
> > +      - amd,versal2-cpm6-host1
> >
> >    reg:
> > -    items:
> > -      - description: MDB System Level Control and Status Register (SLCR) Base
> > -      - description: configuration region
> > -      - description: data bus interface
> > -      - description: address translation unit register
> > +    minItems: 4
> > +    maxItems: 5
> >
> >    reg-names:
> > -    items:
> > -      - const: slcr
> > -      - const: config
> > -      - const: dbi
> > -      - const: atu
>
> Leave the list and extend it.

Thanks, I will extend the reg and reg-names.

>
> > +    minItems: 4
>
> You need only this.
>
> > +    maxItems: 5
> >
> >    ranges:
> >      maxItems: 2
> > @@ -141,3 +182,51 @@ examples:
> >              };
> >          };
> >      };
> > +
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/gpio/gpio.h>
> > +
> > +    soc {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +        pcie@fcdd0000 {
> > +            compatible = "amd,versal2-cpm6-hos
>
> You do not need new example for one new property.

Sure, I will remove this new example.

>
> Best regards,
> Krzysztof