Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support

[Conor Dooley]

On Wed, Jul 29, 2026 at 05:05:43AM +0000, Rohan Santosh Joshi wrote:
> Hi Conor,
> 
> Currently, there is no public domain information that confirms if the elba supports CQE.

Well then modifying it to add CQE is wrong.

> In the last (v2) patch series, Krzysztof mentioned about why the Pensando Elba is NOT being modified/considered for the CQE.

Right, and he's coming at this from the same perspective as me.
We both want to know why you're making (or not making) the changes that
you are to the binding. You didn't explain in v2 why the elba didn't
need the change and now in v3 you haven't actually explained that it
does.

> The current implementation marks CQE as optional space and the related driver can take the CQE or non-CQE path depending on whether the DT defines it.
> Please refer to the cover letter for additional details on this.
> 
> Given the above information, can you please confirm if the next patch should modify the elba or restrict the new reg entries to device compatibles? 

You need to figure that out, perhaps by CCing the person responsible for
the addition and maintainance of the platform?

Additionally, please fix your quoting.

Thanks,
Conor.

> 
> Best Regards,
> Rohan 
> 
> -----Original Message-----
> From: Conor Dooley <conor@xxxxxxxxxx> 
> Sent: Wednesday, July 22, 2026 10:07 PM
> To: Rohan Santosh Joshi <rohan1sj@xxxxxxxxxxx>
> Cc: Ulf Hansson <ulfh@xxxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>; Adrian Hunter <adrian.hunter@xxxxxxxxx>; linux-mmc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Milind Parab <mparab@xxxxxxxxxxx>; Pawel Laszczak <pawell@xxxxxxxxxxx>; Swapnil Kashinath Jakhade <sjakhade@xxxxxxxxxxx>; Manikandan Karunakaran Pillai <mpillai@xxxxxxxxxxx>; razb@xxxxxxxxxxxx
> Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support
> 
> EXTERNAL MAIL
> 
> 
> On Wed, Jul 22, 2026 at 04:18:37PM +0530, Rohan Joshi via B4 Relay wrote:
> > From: Rohan Joshi <rohan1sj@xxxxxxxxxxx>
> > 
> > Cadence host controller can optionally support CQE.
> > Add optional CQE register space to cdns sdhci bindings.
> > 
> > Signed-off-by: Rohan Joshi <rohan1sj@xxxxxxxxxxx>
> > ---
> >  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 28 +++++++++++++++++++---
> >  1 file changed, 25 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > index 6c7317d13aa6..10bc9ac2073a 100644
> > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > @@ -22,7 +22,14 @@ properties:
> >  
> >    reg:
> >      minItems: 1
> > -    maxItems: 2
> > +    maxItems: 3
> > +
> > +  reg-names:
> > +    minItems: 1
> > +    items:
> > +      - const: hc
> > +      - enum: [bctl, cqhci]
> > +      - const: cqhci
> >  
> >    interrupts:
> >      maxItems: 1
> > @@ -131,13 +138,27 @@ allOf:
> >      then:
> >        properties:
> >          reg:
> > +          minItems: 2
> >            items:
> >              - description: Host controller registers
> >              - description: Elba byte-lane enable register for writes
> > +            - description: CQE (Command Queuing Engine) registers (optional)
> 
> I see no explanation in your commit message for why the elba is being
> modified.
> 
> This new reg entry should be restricted to only the device-specific
> compatibles that actually support it.
> 
> pw-bot: changes-requested
> 
> Thanks,
> Conor.
> 
> > +        reg-names:
> > +          minItems: 2
> > +          items:
> > +            - const: hc
> > +            - const: bctl
> > +            - const: cqhci
> >      else:
> >        properties:
> >          reg:
> > -          maxItems: 1
> > +          items:
> > +            - description: Host Controller registers
> > +            - description: CQE (Command Queuing Engine) registers (optional)
> > +        reg-names:
> > +          items:
> > +            - const: hc
> > +            - const: cqhci
> >  
> >  unevaluatedProperties: false
> >  
> > @@ -145,7 +166,8 @@ examples:
> >    - |
> >      emmc: mmc@5a000000 {
> >          compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
> > -        reg = <0x5a000000 0x400>;
> > +        reg = <0x5a000000 0x400>, <0x5a000400 0x060>;
> > +        reg-names = "hc", "cqhci";
> >          interrupts = <0 78 4>;
> >          clocks = <&clk 4>;
> >          bus-width = <8>;
> > 
> > -- 
> > 2.43.0
> > 
> >

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