Re: [PATCH v6 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch
From: Manivannan Sadhasivam
Date: Thu Jul 30 2026 - 01:28:03 EST
On Thu, Jul 30, 2026 at 10:18:55AM +0530, Krishna Chaitanya Chundru wrote:
> The Eliza EVK board connects PCIe1 (8GT/s x2) to a Toshiba TC9563
> PCIe switch. Enable PCIe1 and its QMP PHY nodes.
>
> TC9563 uses I2C (at address 0x77 on I2C4) for its management interface.
>
> Override the base iommu-map with the expanded set covering all the
> switch's downstream ports (0x1400-0x1408 SID range).
>
> The TC9563 RESX# and PERST# are OR-ed internally to assert reset on the
> switch. Use TC9563 RESX# pin via a TLMM GPIO and skip wiring PERST#
> from the PCIe controller.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
> Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> Reviewed-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/eliza-evk.dtsi | 113 ++++++++++++++++++++++++++++++++
> 1 file changed, 113 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> index b35fffb50976..419e737c54e6 100644
> --- a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> @@ -12,6 +12,26 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + vreg_0p9: regulator-0v9 {
> + compatible = "regulator-fixed";
> + regulator-name = "VREG_0P9";
> +
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vreg_1p8: regulator-1v8 {
> + compatible = "regulator-fixed";
> + regulator-name = "VREG_1P8";
> +
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> vreg_pcie_m_3p3: regulator-3p3 {
> compatible = "regulator-fixed";
>
> @@ -99,6 +119,99 @@ pcieport0_ep: endpoint {
> };
> };
>
> +&pcie1 {
> + iommu-map = <0x0 &apps_smmu 0x1400 0x1>,
> + <0x100 &apps_smmu 0x1401 0x1>,
> + <0x208 &apps_smmu 0x1402 0x1>,
> + <0x210 &apps_smmu 0x1403 0x1>,
> + <0x218 &apps_smmu 0x1404 0x1>,
> + <0x300 &apps_smmu 0x1405 0x1>,
> + <0x400 &apps_smmu 0x1406 0x1>,
> + <0x500 &apps_smmu 0x1407 0x1>,
> + <0x501 &apps_smmu 0x1408 0x1>;
> +
> + status = "okay";
> +};
> +
> +&pcie1_phy {
> + vdda-phy-supply = <&vreg_l1k>;
> + vdda-pll-supply = <&vreg_l3k>;
> +
> + status = "okay";
> +};
> +
> +&pcie1_port0 {
> + wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
> + /* Same GPIO is used for both PERST# and resx-gpio */
> +
> + tc9563: pcie@0,0 {
> + compatible = "pci1179,0623";
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + device_type = "pci";
> + ranges;
> + bus-range = <0x2 0xff>;
> +
> + vddc-supply = <&vreg_0p9>;
> + vdd18-supply = <&vreg_1p8>;
> + vdd09-supply = <&vreg_0p9>;
> + vddio1-supply = <&vreg_1p8>;
> + vddio2-supply = <&vreg_1p8>;
> + vddio18-supply = <&vreg_1p8>;
> +
> + i2c-parent = <&i2c4 0x77>;
> +
> + resx-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
> +
> + pcie@1,0 {
> + reg = <0x20800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + device_type = "pci";
> + ranges;
> + bus-range = <0x3 0xff>;
> + };
> +
> + pcie@2,0 {
> + reg = <0x21000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + device_type = "pci";
> + ranges;
> + bus-range = <0x4 0xff>;
> + };
> +
> + pcie@3,0 {
> + reg = <0x21800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x5 0xff>;
> +
> + pcie@0,0 {
> + reg = <0x50000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
Sashiko pointed out that you are using bridge specific properties in EP node:
https://lore.kernel.org/linux-pci/20260730051031.20D8E1F000E9@xxxxxxxxxxxxxxx
- Mani
--
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