Re: [PATCH v2 3/4] riscv: dts: spacemit: k3: add USB3 B and C controllers for Pico-ITX board

From: Aurelien Jarno

Date: Thu Jul 30 2026 - 06:22:09 EST


Hi,

On 2026-07-29 17:33, sashiko-bot@xxxxxxxxxx wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Mismatch between the length of the `phys` and `phy-names` properties in the `usb3b` and `usb3c` device tree nodes.
> --
>
> --- Patch [3]: [PATCH v2 3/4] riscv: dts: spacemit: k3: add USB3 B and C controllers for Pico-ITX board ---
> commit 2aa9a6448bde1ee249cba54ddbed1021d4ace1cc
> Author: Aurelien Jarno <aurelien@xxxxxxxxxxx>
>
> riscv: dts: spacemit: k3: add USB3 B and C controllers for Pico-ITX board
>
> This commit adds the USB3 B and C controller nodes and their corresponding
> USB2 and USB3 PHY nodes to the SpacemiT K3 SoC device tree. It also enables
> them on the K3 Pico-ITX board in USB 2 mode.
>
> > diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
> > index 0eb24fac4733e..b786f119d4f95 100644
> > --- a/arch/riscv/boot/dts/spacemit/k3.dtsi
> > +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
> [ ... ]
> > + usb3b: usb@81400000 {
> > + compatible = "spacemit,k3-dwc3";
> > + reg = <0x0 0x81400000 0x0 0x10000>;
> [ ... ]
> > + resets = <&syscon_apmu RESET_APMU_USB3_B_AHB>,
> > + <&syscon_apmu RESET_APMU_USB3_B_VCC>,
> > + <&syscon_apmu RESET_APMU_USB3_B_PHY>;
> > + reset-names = "ahb", "vcc", "phy";
> > + phys = <&usb3b_u2phy>,
> > + <&combophy 2 PHY_TYPE_USB3>;
> > + phy-names = "usb2-phy";
>
> [Severity: Medium]
> Does this mismatch between the array lengths of phys and phy-names cause
> dtbs_check schema validation to fail? The phys property defines two items,
> but phy-names only lists "usb2-phy", omitting "usb3-phy".
>

This is correct, i'll fix that in v3.

Regards
Aurelien

--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@xxxxxxxxxxx http://aurel32.net