Re: [PATCH v6 4/5] dt-bindings: pinctrl: qcom,hawi-lpass-lpi-pinctrl: Add Hawi LPI pinctrl
From: Srinivas Kandagatla
Date: Thu Jul 30 2026 - 08:06:06 EST
On 7/24/26 3:17 PM, Prasad Kumpatla wrote:
> Add bindings for the pin controller in Low Power Audio SubSystem (LPASS)
> of Qualcomm Hawi SoC.
>
> The controller has 23 GPIOs (gpio0-gpio22) with functions including
> SoundWire, I2S, DMIC, VA I2S, ext_mclk1, slimbus and lpass_lpi_dbg_clk.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@xxxxxxxxxxxxxxxx>
> ---
> .../pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml | 109 ++++++++++++++++++
> 1 file changed, 109 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml
> new file mode 100644
> index 000000000000..af68581750cf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml
> @@ -0,0 +1,109 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Hawi SoC LPASS LPI TLMM
> +
> +maintainers:
> + - Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> + - Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
> + - Prasad Kumpatla <prasad.kumpatla@xxxxxxxxxxxxxxxx>
> +
> +description:
> + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
> + (LPASS) Low Power Island (LPI) of Qualcomm Hawi SoC.
> +
> +properties:
> + compatible:
> + const: qcom,hawi-lpass-lpi-pinctrl
> +
> + reg:
> + items:
> + - description: LPASS LPI TLMM Control and Status registers
> +
> + clocks:
> + items:
> + - description: LPASS LPR(Low Power Resource) voting clock
> + - description: LPASS Audio voting clock
> +
> + clock-names:
> + items:
> + - const: lpr
> + - const: audio
> +
> +patternProperties:
> + "-state$":
> + oneOf:
> + - $ref: "#/$defs/qcom-hawi-lpass-state"
> + - patternProperties:
> + "-pins$":
> + $ref: "#/$defs/qcom-hawi-lpass-state"
> + additionalProperties: false
> +
> +$defs:
> + qcom-hawi-lpass-state:
> + type: object
> + description:
> + Pinctrl node's client devices use subnodes for desired pin configuration.
> + Client device subnodes use below standard properties.
> + $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
> + unevaluatedProperties: false
> +
> + properties:
> + pins:
> + description:
> + List of gpio pins affected by the properties specified in this
> + subnode.
> + items:
> + pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
> +
> + function:
> + enum: [dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
> + dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,
> + ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,
> + i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
> + i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws,
> + lpass_lpi_dbg_clk, qca_swr_clk, qca_swr_data, slimbus_clk,
> + slimbus_data, swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_clk1,
> + swr_tx_data, va_i2s0_clk, va_i2s0_data, va_i2s0_ws,
> + wsa2_swr_clk, wsa2_swr_data, wsa_swr_clk, wsa_swr_data]
> + description:
> + Specify the alternative function to be configured for the specified
> + pins.
> +
> +allOf:
> + - $ref: qcom,lpass-lpi-common.yaml#
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
> +
> + lpass_tlmm: pinctrl@7f60000 {
> + compatible = "qcom,hawi-lpass-lpi-pinctrl";
> + reg = <0x07f60000 0x20000>;
> +
> + clocks = <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
TBH, you could have used integer instead of define here, which could
have made things easy for maintainer to merge the series.
--srini
> + clock-names = "lpr", "audio";
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&lpass_tlmm 0 0 23>;
> +
> + tx-swr-sleep-clk-state {
> + pins = "gpio0";
> + function = "swr_tx_clk";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> + };