linux-next: manual merge of the mediatek tree with the arm-soc tree

From: Mark Brown

Date: Thu Jul 30 2026 - 09:22:58 EST


Hi all,

Today's linux-next merge of the mediatek tree got a conflict in:

drivers/soc/mediatek/mt8167-mmsys.h

between commit:

2fa28edca0f4f ("soc: mediatek: mtk-mmsys: Rework routes to specify component ID")

from the arm-soc tree and commit:

bd3cbc42aa8cb ("soc: mediatek: mtk-mmsys: Rework routes to specify component ID")

from the mediatek tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

Actuallly instead of this I took the mediatek tree side of things as
there was a build break resulting. This all doesn't seem terribly
joined up...

diff --combined drivers/soc/mediatek/mt8167-mmsys.h
index 001379373507a,d579feee4212f..0000000000000
--- a/drivers/soc/mediatek/mt8167-mmsys.h
+++ b/drivers/soc/mediatek/mt8167-mmsys.h
@@@ -10,29 -10,24 +10,24 @@@
#define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x06c

#define MT8167_DITHER_MOUT_EN_RDMA0 0x1
- #define MT8167_DITHER_MOUT_EN_MASK 0x7
-
#define MT8167_RDMA0_SOUT_DSI0 0x2
- #define MT8167_RDMA0_SOUT_MASK 0x3
-
#define MT8167_DSI0_SEL_IN_RDMA0 0x1
- #define MT8167_DSI0_SEL_IN_MASK 0x3

static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
MMSYS_ROUTE(OVL, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
OVL0_MOUT_EN_COLOR0),
MMSYS_ROUTE(DITHER, 0, RDMA, 0,
- MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0,
+ MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_MASK,
MT8167_DITHER_MOUT_EN_RDMA0),
MMSYS_ROUTE(OVL, 0, COLOR, 0,
MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, COLOR0_SEL_IN_OVL0,
COLOR0_SEL_IN_OVL0),
MMSYS_ROUTE(RDMA, 0, DSI, 0,
- MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_RDMA0,
+ MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_MASK,
MT8167_DSI0_SEL_IN_RDMA0),
MMSYS_ROUTE(RDMA, 0, DSI, 0,
- MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_DSI0,
+ MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_MASK,
MT8167_RDMA0_SOUT_DSI0),
};

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