linux-next: manual merge of the spi tree with the qcom tree
From: Mark Brown
Date: Fri Jul 31 2026 - 10:40:43 EST
Hi all,
Today's linux-next merge of the spi tree got a conflict in:
include/linux/soc/qcom/geni-se.h
between commit:
522bfb4f33c09 ("soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware size")
from the qcom tree and commit:
f40e7ab049f4b ("soc: qcom: geni-se: trace: Add trace event support for GENI SE registers dump")
from the spi tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --cc include/linux/soc/qcom/geni-se.h
index 0991ef7ec0928,8c08c19173749..0000000000000
--- a/include/linux/soc/qcom/geni-se.h
+++ b/include/linux/soc/qcom/geni-se.h
@@@ -115,16 -120,42 +120,43 @@@ struct geni_se
#define SE_GENI_IOS 0x908
#define SE_GENI_M_GP_LENGTH 0x910
#define SE_GENI_S_GP_LENGTH 0x914
+ /* TX DMA registers */
+ #define SE_DMA_TX_PTR_L 0xc30
+ #define SE_DMA_TX_PTR_H 0xc34
+ #define SE_DMA_TX_ATTR 0xc38
+ #define SE_DMA_TX_LEN 0xc3c
#define SE_DMA_TX_IRQ_STAT 0xc40
#define SE_DMA_TX_IRQ_CLR 0xc44
+ #define SE_DMA_TX_IRQ_EN 0xc48
+ #define SE_DMA_TX_IRQ_EN_SET 0xc4c
+ #define SE_DMA_TX_IRQ_EN_CLR 0xc50
+ #define SE_DMA_TX_LEN_IN 0xc54
#define SE_DMA_TX_FSM_RST 0xc58
+ #define SE_DMA_TX_MAX_BURST 0xc5c
+ /* RX DMA registers */
+ #define SE_DMA_RX_PTR_L 0xd30
+ #define SE_DMA_RX_PTR_H 0xd34
+ #define SE_DMA_RX_ATTR 0xd38
+ #define SE_DMA_RX_LEN 0xd3c
#define SE_DMA_RX_IRQ_STAT 0xd40
#define SE_DMA_RX_IRQ_CLR 0xd44
+ #define SE_DMA_RX_IRQ_EN 0xd48
+ #define SE_DMA_RX_IRQ_EN_SET 0xd4c
+ #define SE_DMA_RX_IRQ_EN_CLR 0xd50
#define SE_DMA_RX_LEN_IN 0xd54
#define SE_DMA_RX_FSM_RST 0xd58
+ #define SE_DMA_RX_MAX_BURST 0xd5c
+ /* DMA general / debug registers */
+ #define SE_GSI_EVENT_EN 0xe18
+ #define SE_IRQ_EN 0xe1c
+ #define DMA_IF_EN_RO 0xe20
#define SE_HW_PARAM_0 0xe24
#define SE_HW_PARAM_1 0xe28
+#define SE_HW_PARAM_2 0xe2c
+ #define DMA_GENERAL_CFG 0xe30
+ #define SE_DMA_QSB_TRANS_CFG 0xe38
+ #define SE_DMA_DEBUG_REG0 0xe40
+ #define SE_DMA_IF_EN 0x2004
/* GENI_FORCE_DEFAULT_REG fields */
#define FORCE_DEFAULT BIT(0)
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