Re: [PATCH 10/24] preempt: Introduce HAS_SEPARATE_PREEMPT_RESCHED_BITS
From: Boqun Feng
Date: Mon Aug 03 2026 - 13:20:07 EST
On Mon, Aug 03, 2026 at 05:19:43PM +0200, Peter Zijlstra wrote:
> On Mon, Aug 03, 2026 at 08:04:59AM -0700, Boqun Feng wrote:
>
> > > > +/*
> > > > + * unsigned long preempt count parameter works for both 32bit and 64bit cases:
> > > > + *
> > > > + * - For 32bit, "int" (the return of preempt_count()) and "unsigned long" have
> > > > + * the same size.
> > > > + * - For 64bit, the effective bits of a preempt count sits in 32bit, and we
> > > > + * reserve the NEED_RESCHED bit from the old count.
> > > > + */
> > >
> > > The 64bit comment doesn't really make sense to me.
> > >
> >
> > Ah, I meant "preserve" instead of "reserve"..
>
> Ah, yes, that makes sense.
>
> > > > diff --git a/include/linux/preempt.h b/include/linux/preempt.h
> > > > index 33fc4c814a9f..87d5367f986c 100644
> > > > --- a/include/linux/preempt.h
> > > > +++ b/include/linux/preempt.h
> > > > @@ -30,18 +30,20 @@
> > > > * NMI nesting depth is tracked in a separate per-CPU variable
> > > > * (nmi_nesting) to save bits in preempt_count.
> > > > *
> > > > - * PREEMPT_MASK: 0x000000ff
> > > > - * SOFTIRQ_MASK: 0x0000ff00
> > > > - * HARDIRQ_DISABLE_MASK: 0x00ff0000
> > > > - * HARDIRQ_MASK: 0x0f000000
> > > > - * NMI_MASK: 0x10000000
> > > > - * PREEMPT_NEED_RESCHED: 0x80000000
> > > > + * 32bit HAS_SEPARATE_PREEMPT_RESCHED_BITS
> > > > + *
> > > > + * PREEMPT_MASK: 0x000000ff 0x00000000000000ff
> > > > + * SOFTIRQ_MASK: 0x0000ff00 0x000000000000ff00
> > > > + * HARDIRQ_DISABLE_MASK: 0x00ff0000 0x0000000000ff0000
> > > > + * HARDIRQ_MASK: 0x0f000000 0x000000000f000000
> > > > + * NMI_MASK: 0x10000000 0x00000000f0000000
> > > > + * PREEMPT_NEED_RESCHED: 0x80000000 0x8000000000000000
> > > > */
> > >
> > > Perhaps add a comment about how HAS_SEPARATE_PREEMPT_RESCHED_BITS really
> > > is about having PREEMPT_NEED_RESCHED in its own word, rather than
> > > preempt_count() being 64bit.
> > >
> > > Because as presented it is very easy to confuse these two options.
> > > Ideally it would explain the LOAD-STORE issue with NEED_RESCHED and
> > > point to ARM64 or something.
> >
> > How about organizing the comments as following:
> >
> > + *
> > + * PREEMPT_MASK: 0x000000ff
> > + * SOFTIRQ_MASK: 0x0000ff00
> > + * HARDIRQ_DISABLE_MASK: 0x00ff0000
> > + * HARDIRQ_MASK: 0x0f000000
> > + *
> > + * Depending on HAS_SEPARATE_PREEMPT_RESCHED_BITS, NEED_RESCHED bit
> > + * is put in a separate 32bits.
> > + *
> > + * HAS_SEPARATE_PREEMPT_RESCHED_BITS=n:
> > + *
> > + * NMI_MASK: 0x10000000
> > + * PREEMPT_NEED_RESCHED: 0x80000000
> > + *
> > + * HAS_SEPARATE_PREEMPT_RESCHED_BITS=y:
> > + *
> > + * (NMI_MASK can use all the 4 bits)
> > + *
> > + * NMI_MASK: 0xf0000000
> >
> > Thoughts?
>
> Perhaps add something like:
>
> "Having PREEMPT_NEED_RESCHED in a separate word allows 64bit load-store
> architectures to 'set' PREEMPT_NEED_RESCHED without messing up the
> otherwise symmetric modifications used on preempt_count and still load
> the whole thing (single-copy) atomically, without having to resort to
> full atomic operations."
>
>
Will do this as well. Thanks!
Regards,
Boqun