Re: [PATCH 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC

From: Dmitry Baryshkov

Date: Mon Aug 10 2026 - 21:14:06 EST


On Sun, Aug 09, 2026 at 12:57:14PM +0530, Hardeep Sharma wrote:
> Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS
> (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC.
>
> Peripherals included in this initial set:
> - Single Cortex-A7 CPU with PSCI idle states
> - RPMh RSC with clock controller, power domains, and BCM voter
> - GCC (Global Clock Controller)
> - TLMM pin controller (110 GPIOs)
> - Interconnect (aggre-noc, cnoc-main)
> - GENI UART console (QUP SE3)
> - SMEM, hardware spinlocks (TCSR mutex)

This is pretty limited without any storage. Does it NAND?

> Signed-off-by: Hardeep Sharma <hardeep.sharma@xxxxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom/Makefile | 1 +
> arch/arm/boot/dts/qcom/qcom-kuno-idp.dts | 25 ++
> arch/arm/boot/dts/qcom/qcom-kuno.dtsi | 423 +++++++++++++++++++++++++++++++
> 3 files changed, 449 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
> index 026d5b682b2b..7327a7b8180e 100644
> --- a/arch/arm/boot/dts/qcom/Makefile
> +++ b/arch/arm/boot/dts/qcom/Makefile
> @@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
> qcom-ipq4019-ap.dk07.1-c2.dtb \
> qcom-ipq8064-ap148.dtb \
> qcom-ipq8064-rb3011.dtb \
> + qcom-kuno-idp.dtb \
> qcom-msm8226-microsoft-dempsey.dtb \
> qcom-msm8226-microsoft-makepeace.dtb \
> qcom-msm8226-microsoft-moneypenny.dtb \
> diff --git a/arch/arm/boot/dts/qcom/qcom-kuno-idp.dts b/arch/arm/boot/dts/qcom/qcom-kuno-idp.dts
> new file mode 100644
> index 000000000000..c2f6650d3fe6
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-kuno-idp.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +/dts-v1/;
> +
> +#include "qcom-kuno.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. Kuno IDP";
> + compatible = "qcom,kuno-idp", "qcom,kuno";
> +
> + aliases {
> + serial0 = &uart3;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +&uart3 {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/qcom/qcom-kuno.dtsi b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
> new file mode 100644
> index 000000000000..073dda34e188
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
> @@ -0,0 +1,423 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#include <dt-bindings/clock/qcom,kuno-gcc.h>
> +#include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/qcom,rpmhpd.h>
> +#include <dt-bindings/power/qcom-rpmpd.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + interrupt-parent = <&intc>;
> +
> + pcie_phy: clock-100000000 {
> + compatible = "fixed-clock";
> + clock-frequency = <100000000>;
> + #clock-cells = <0>;
> + };

Is it not provided by the PHY?

> +
> + sleep_clk: clock-32000 {
> + compatible = "fixed-clock";
> + clock-frequency = <32000>;
> + #clock-cells = <0>;
> + };
> +
> + xo_board: clock-38400000 {
> + compatible = "fixed-clock";
> + clock-frequency = <38400000>;
> + #clock-cells = <0>;
> + };

Move them to /clocks/, rename nodes to xo-board and sleep-clk.

> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + reg = <0x0>;
> + enable-method = "psci";
> + cpu-idle-states = <&little_cpu_sleep_0>, <&little_cpu_sleep_1>;
> + power-domains = <&cpu_pd0>;
> + power-domain-names = "psci";
> + };
> + };
> +
> + domain-idle-states {
> + cluster_sleep_0: cluster-sleep-0 {
> + compatible = "domain-idle-state";
> + idle-state-name = "cx-min";
> + entry-latency-us = <750>;
> + exit-latency-us = <2350>;
> + min-residency-us = <9144>;
> + arm,psci-suspend-param = <0x40000008>;

Non-OSI?

> + };
> + };

Should be a part of the cpu node.

> +
> + firmware {
> + scm {
> + compatible = "qcom,scm-kuno", "qcom,scm";
> + };
> + };
> +
> + idle-states {

Move to /cpu/

> + entry-method = "psci";
> +
> + little_cpu_sleep_0: cpu-sleep-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "standalone-pc";
> + entry-latency-us = <350>;
> + exit-latency-us = <450>;
> + min-residency-us = <1774>;
> + arm,psci-suspend-param = <0x40000003>;
> + local-timer-stop;
> + };
> +
> + little_cpu_sleep_1: cpu-sleep-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "pc";
> + entry-latency-us = <550>;
> + exit-latency-us = <750>;
> + min-residency-us = <6700>;
> + arm,psci-suspend-param = <0x40000004>;
> + local-timer-stop;
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x0>;
> + };
> +
> + psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> +
> + cpu_pd0: power-domain-cpu0 {
> + #power-domain-cells = <0>;
> + power-domains = <&cluster_pd>;
> + };
> +
> + cluster_pd: power-domain-cluster {
> + #power-domain-cells = <0>;
> + domain-idle-states = <&cluster_sleep_0>;
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + quickboot@82100000 {
> + reg = <0x82100000 0x100000>;
> + no-map;
> + };
> +
> + aop-image@82200000 {
> + reg = <0x82200000 0x20000>;
> + no-map;
> + };
> +
> + aop-cmd-db@82220000 {
> + compatible = "qcom,cmd-db";
> + reg = <0x82220000 0x20000>;
> + no-map;
> + };
> +
> + aop-config@82240000 {
> + reg = <0x82240000 0x20000>;
> + no-map;
> + };
> +
> + uefi-log@82260000 {
> + reg = <0x82260000 0x10000>;
> + no-map;
> + };
> +
> + ipa-fw@82270000 {
> + reg = <0x82270000 0x10000>;
> + no-map;
> + };
> +
> + smem@82280000 {
> + compatible = "qcom,smem";
> + reg = <0x82280000 0xc0000>;
> + hwlocks = <&tcsr_mutex 3>;
> + no-map;
> + };
> +
> + tme-crashdump@82340000 {
> + reg = <0x82340000 0x40000>;
> + no-map;
> + };
> +
> + tme-log@82380000 {
> + reg = <0x82380000 0x4000>;
> + no-map;
> + };
> +
> + access-control-db@82384000 {
> + reg = <0x82384000 0x40000>;
> + no-map;
> + };
> +
> + secdata@823c4000 {
> + reg = <0x823c4000 0x1000>;
> + no-map;
> + };
> +
> + modem-efs@823c5000 {
> + reg = <0x823c5000 0x10000>;
> + no-map;
> + };

Modem memory, but no MSS power domain?

> +
> + cpucp-fw@82400000 {
> + reg = <0x82400000 0x80000>;
> + no-map;
> + };
> +

--
With best wishes
Dmitry