[PATCH v2 1/9] dt-bindings: phy: Document ST STM32MP25 USB2-FEMTO PHY

[Marek Vasut]

From: Pankaj Dev <pankaj.dev@xxxxxx>

Document USB2 PHY for STM32MP25 USB2 controllers, which includes the
USB2.0 host-only controller and USB 2.0 part of the DWC3 controller.
Two such PHYs in total are present in STM32MP25 SoC, they both are
slightly different, therefore they use different compatible string
to discern them.

Co-developed-by: Pankaj Dev <pankaj.dev@xxxxxx>
Signed-off-by: Pankaj Dev <pankaj.dev@xxxxxx>
Co-developed-by: Rahul Kumar <rahul.kumar05@xxxxxx>
Signed-off-by: Rahul Kumar <rahul.kumar05@xxxxxx>
Co-developed-by: Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
Co-developed-by: Clément Le Goffic <clement.legoffic@xxxxxxxxxxx>
Signed-off-by: Clément Le Goffic <clement.legoffic@xxxxxxxxxxx>
Signed-off-by: Marek Vasut <marex@xxxxxxxxxxxx>
---
Cc: Alexandre Torgue <alexandre.torgue@xxxxxxxxxxx>
Cc: Christian Bruel <christian.bruel@xxxxxxxxxxx>
Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
Cc: Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Cc: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
Cc: Maxime Coquelin <mcoquelin.stm32@xxxxxxxxx>
Cc: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
Cc: Pankaj Dev <pankaj.dev@xxxxxx>
Cc: Rahul Kumar <rahul.kumar05@xxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: Rosen Penev <rosenp@xxxxxxxxx>
Cc: Thinh Nguyen <Thinh.Nguyen@xxxxxxxxxxxx>
Cc: Vinod Koul <vkoul@xxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: kernel@xxxxxxxxxxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Cc: linux-phy@xxxxxxxxxxxxxxxxxxx
Cc: linux-stm32@xxxxxxxxxxxxxxxxxxxxxxxxxxxx
Cc: linux-usb@xxxxxxxxxxxxxxx
---
V2: - Fix up Sob/Cdb lines
    - Fix up compatible string in example
    - Use additionalProperties: false
    - Expand description:
    - Use clock-cells = <1> to discern OSC and future PLL clock from the PHY
---
 .../bindings/phy/st,stm32-usb2phy.yaml        | 73 +++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml
new file mode 100644
index 0000000000000..ab6c943af9a25
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/st,stm32-usb2phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 MPU High-Speed USB PHY
+
+description:
+  USB2 PHY block in STM32 is attached to USB 2.0 Host controller and
+  USB 2.0 side of DWC3 DRD controller, and provides the USB LS/FS/HS
+  connectivity. Both PHYs are the FEMTO-PHY, but their configuration
+  bits in the system control register are different for each variant.
+
+maintainers:
+  - Fabrice Gasnier <fabrice.gasnier@xxxxxxxxxxx>
+  - Marek Vasut <marex@xxxxxxxxxxxx>
+  - Pankaj Dev <pankaj.dev@xxxxxx>
+
+properties:
+  compatible:
+    enum:
+      - st,stm32mp25-usb2phy1
+      - st,stm32mp25-usb2phy2
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  vdd33-supply:
+    description: Phandle to regulator providing 3V3 power supply to the USB2 HS PHY
+
+  st,syscfg:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description: Phandle to system configuration controller.
+    items:
+      - items:
+          - description: phandle to syscfg
+          - description: USB2PHY control offset within syscfg
+
+  "#clock-cells":
+    const: 1
+
+required:
+  - compatible
+  - "#clock-cells"
+  - "#phy-cells"
+  - clocks
+  - resets
+  - st,syscfg
+  - vdd33-supply
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
+    #include <dt-bindings/reset/st,stm32mp25-rcc.h>
+
+    usb2_phy2: usb-phy {
+        compatible = "st,stm32mp25-usb2phy1";
+        #clock-cells = <1>;
+        #phy-cells = <0>;
+        clocks = <&rcc CK_KER_USB2PHY2>;
+        resets = <&rcc USB2PHY2_R>;
+        st,syscfg = <&syscfg 0x2800>;
+        vdd33-supply = <&vdd33usb>;
+    };
-- 
2.53.0