Re: [PATCH v2 1/5] arm64: dts: qcom: Add SM7250 base dts file

[Dmitry Baryshkov]

On Sun, Aug 16, 2026 at 04:18:04PM +0000, Sreeshankar K wrote:
> Add devicetree file for SM7250 SoC and SM7250 MTP platform.
> This file adds the basic nodes like cpu, psci and other required
> configuration for booting up to the serial console.
> 
> Signed-off-by: Sreeshankar K <sreeshankar0910@xxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/Makefile       |   1 +
>  arch/arm64/boot/dts/qcom/sm7250-mtp.dts |  30 ++
>  arch/arm64/boot/dts/qcom/sm7250.dtsi    | 499 ++++++++++++++++++++++++
>  3 files changed, 530 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm7250-mtp.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/sm7250.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 6f33c4e2f..4b68ed17f 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -347,6 +347,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm6375-sony-xperia-murray-pdx225.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm7125-xiaomi-curtana.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm7125-xiaomi-joyeuse.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm7225-fairphone-fp4.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sm7250-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm7325-motorola-dubai.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm7325-nothing-spacewar.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm7250-mtp.dts b/arch/arm64/boot/dts/qcom/sm7250-mtp.dts
> new file mode 100644
> index 000000000..062b5958e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm7250-mtp.dts
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2026, Sreeshankar K <sreeshankar0910@xxxxxxxxx>
> + */
> +
> +/dts-v1/;
> +
> +#include "sm7250.dtsi"

If you have declared SPMI node, you can include PMIC files here.

> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. SM7250 MTP";
> +	compatible = "qcom,sm7250-mtp", "qcom,sm7250";
> +
> +	aliases {
> +		serial0 = &uart2;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&qupv3_id_1 {
> +	status = "okay";
> +};
> +
> +&uart2 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sm7250.dtsi b/arch/arm64/boot/dts/qcom/sm7250.dtsi
> new file mode 100644
> index 000000000..f942eb230
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm7250.dtsi
> @@ -0,0 +1,499 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2026, Sreeshankar K <sreeshankar0910@xxxxxxxxx>
> + */
> +
> +#include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/clock/qcom,gcc-sm7250.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +
> +/ {
> +	interrupt-parent = <&intc>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	clocks {
> +		xo_board: xo-board {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <38400000>;
> +			clock-output-names = "xo_board";
> +		};
> +
> +		sleep_clk: sleep-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <32000>;
> +		};

Please move these clocks to the board DT. You an keep referencing them
from the DTSI (see for example, sm8750.dtsi).

> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "qcom,kryo475";
> +			reg = <0x0 0x0>;
> +			enable-method = "psci";
> +			next-level-cache = <&l2_0>;
> +			l2_0: l2-cache {

empty lines between each subnode (here and further).

> +				compatible = "cache";
> +				cache-level = <2>;
> +				cache-size = <0x20000>;
> +				cache-unified;
> +				next-level-cache = <&l3_0>;
> +				l3_0: l3-cache {
> +					compatible = "cache";
> +					cache-level = <3>;
> +					cache-size = <0x200000>;
> +					cache-unified;
> +				};
> +			};
> +		};
> +

[..]

> +
> +	reserved_memory: reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hyp_mem: memory@80000000 {

Don't use just memory@. Add more descriptive node names (again,
sm8750.dtsi).

> +			reg = <0x0 0x80000000 0x0 0x600000>;
> +			no-map;
> +		};
> +
> +		xbl_aop_mem: memory@80700000 {
> +			reg = <0x0 0x80700000 0x0 0x160000>;
> +			no-map;
> +		};
> +
> +		cmd_db: memory@80860000 {
> +			compatible = "qcom,cmd-db";
> +			reg = <0x0 0x80860000 0x0 0x20000>;
> +			no-map;
> +		};
> +
> +		smem_mem: memory@80900000 {
> +			reg = <0x0 0x80900000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		removed_mem: memory@80b00000 {
> +			reg = <0x0 0x80b00000 0x0 0x1300000>;
> +			no-map;
> +		};
> +
> +		camera_mem: memory@86000000 {
> +			reg = <0x0 0x86000000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		gpu_mem: memory@8bc15400 {
> +			reg = <0x0 0x8bc15400 0x0 0x2000>;
> +			no-map;
> +		};
> +
> +		npu_mem: memory@86500000 {
> +			reg = <0x0 0x86500000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		video_mem: memory@86a00000 {
> +			reg = <0x0 0x86a00000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		wlan_mem: memory@8ba00000 {
> +			reg = <0x0 0x8ba00000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		ipa_fw_mem: memory@8bc00000 {
> +			reg = <0x0 0x8bc00000 0x0 0x10000>;
> +			no-map;
> +		};
> +
> +		ipa_gsi_mem: memory@8bc10000 {
> +			reg = <0x0 0x8bc10000 0x0 0x5400>;
> +			no-map;
> +		};
> +
> +		cdsp_mem: memory@87400000 {
> +			reg = <0x0 0x87400000 0x0 0x1e00000>;
> +			no-map;
> +		};
> +
> +		adsp_mem: memory@89200000 {
> +			reg = <0x0 0x89200000 0x0 0x2800000>;
> +			no-map;
> +		};
> +
> +		modem_mem: memory@8c000000 {
> +			reg = <0x0 0x8c000000 0x0 0xf800000>;
> +			no-map;
> +		};
> +
> +		cdsp_sec_mem: memory@9f400000 {
> +			reg = <0x0 0x9f400000 0x0 0xc00000>;
> +			no-map;
> +		};
> +	};
> +
> +	smem: qcom,smem {

Don't use qcom, in node names. the label is unused. Also you can just
move it to the reserved-memory and drop memory-region.

> +		compatible = "qcom,smem";
> +		memory-region = <&smem_mem>;
> +		hwlocks = <&tcsr_mutex 3>;
> +	};
> +
> +	soc: soc@0 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0 0 0 0 0x10 0>;
> +		dma-ranges = <0 0 0 0 0x10 0>;
> +		compatible = "simple-bus";
> +
> +		gcc: clock-controller@100000 {
> +			compatible = "qcom,gcc-sm7250";

qcom,sm7250-gcc. Where are the bindings, BTW?

> +			reg = <0x0 0x00100000 0x0 0x1f0000>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;
> +			clock-names = "bi_tcxo",
> +				      "bi_tcxo_ao",
> +				      "sleep_clk";
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&rpmhcc RPMH_CXO_CLK_A>,
> +				 <&sleep_clk>;
> +		};
> +
> +		qupv3_id_1: geniqup@9c0000 {
> +			compatible = "qcom,geni-se-qup";
> +			reg = <0x0 0x009c0000 0x0 0x6000>;
> +			clock-names = "m-ahb", "s-ahb";
> +			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
> +				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +			status = "disabled";
> +
> +			uart2: serial@988000 {
> +			compatible = "qcom,geni-debug-uart";

Wring indentation.

> +				reg = <0 0x00988000 0 0x4000>;
> +				clock-names = "se";
> +				clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
> +				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> +				status = "disabled";
> +			};
> +		};
> +
> +		intc: interrupt-controller@17a00000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x0 0x17a00000 0x0 0x10000>,     /* GICD */
> +			      <0x0 0x17a60000 0x0 0x100000>;    /* GICR * 8 */
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupts = <GIC_PPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
> +		pdc: interrupt-controller@b220000 {
> +			compatible = "qcom,sm7250-pdc", "qcom,pdc";
> +			reg = <0 0xb220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
> +			qcom,pdc-ranges = <0 480 42>, <42 612 28>,
> +					  <70 63 1>, <71 640 15>, <86 522 52>;
> +			#interrupt-cells = <2>;
> +			interrupt-parent = <&intc>;
> +			interrupt-controller;
> +		};
> +
> +		spmi_bus: spmi@c440000 {
> +			compatible = "qcom,spmi-pmic-arb";
> +			reg = <0x0 0x0c440000 0x0 0x0001100>,
> +			      <0x0 0x0c600000 0x0 0x2000000>,
> +			      <0x0 0x0e600000 0x0 0x0100000>,
> +			      <0x0 0x0e700000 0x0 0x00a0000>,
> +			      <0x0 0x0c40a000 0x0 0x0026000>;
> +			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> +			interrupt-names = "periph_irq";
> +			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
> +			qcom,ee = <0>;
> +			qcom,channel = <0>;
> +			#address-cells = <2>;
> +			#size-cells = <0>;
> +			interrupt-controller;
> +			#interrupt-cells = <4>;
> +		};
> +
> +		apps_rsc: rsc@18200000 {
> +			label = "apps_rsc";

Move label further down. The typical order is: compatible,
reg+reg-names, then everything else.

> +			compatible = "qcom,rpmh-rsc";
> +			reg = <0x0 0x18200000 0x0 0x10000>,
> +			      <0x0 0x18210000 0x0 0x10000>,
> +			      <0x0 0x18220000 0x0 0x10000>;
> +			reg-names = "drv-0", "drv-1", "drv-2";
> +			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +			qcom,tcs-offset = <0xd00>;
> +			qcom,drv-id = <2>;
> +			qcom,tcs-config = <ACTIVE_TCS  2>, <SLEEP_TCS   3>,
> +					  <WAKE_TCS    3>, <CONTROL_TCS 1>;
> +
> +			rpmhcc: clock-controller {
> +				compatible = "qcom,sm7250-rpmh-clk";

Missing schema and a driver update.

> +				#clock-cells = <1>;
> +				clock-names = "xo";
> +				clocks = <&xo_board>;
> +			};

While you are at it, please add rpmhpd here. Most likely gcc needs to
use RPMHPD_CX as as power-domain.

> +		};
> +

-- 
With best wishes
Dmitry