[tip: timers/clocksource] clocksource/drivers/rtl-otto: Change driver to use __raw reads and writes

[tip-bot2 for Rustam Adilov]

The following commit has been merged into the timers/clocksource branch of tip:

Commit-ID:     739007deca12d95db13762301b0745aa92938717
Gitweb:        https://git.kernel.org/tip/739007deca12d95db13762301b0745aa92938717
Author:        Rustam Adilov <adilov@xxxxxxxxxxx>
AuthorDate:    Sat, 25 Jul 2026 22:55:10 +05:00
Committer:     Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
CommitterDate: Thu, 13 Aug 2026 18:13:15 +02:00

clocksource/drivers/rtl-otto: Change driver to use __raw reads and writes

As it stands, the driver uses ioread32 and iowrite32 for register
access and it works fine. However this stops working when the
SWAP_IO_SPACE config is enabled as this drivers expects ioread32 and
iowrite32 to be in native endian (that is big endian for currently
supported SoCs). RTL9607C is a big endian MIPS SoC that has identical
timer as the already supported chips but needs to have SWAP_IO_SPACE
to have a functioning little endian USB host.

Fix this by replacing all instances of ioread32 and iowrite32 with
__raw_readl and __raw_writel variants. Since they essentially do the
same register access, this shouldn't affect anything on other
machines.

Signed-off-by: Rustam Adilov <adilov@xxxxxxxxxxx>
Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
Reviewed-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
Link: https://patch.msgid.link/20260725175510.77240-1-adilov@xxxxxxxxxxx
---
 drivers/clocksource/timer-rtl-otto.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/clocksource/timer-rtl-otto.c b/drivers/clocksource/timer-rtl-otto.c
index dd236a7..0d1b9a0 100644
--- a/drivers/clocksource/timer-rtl-otto.c
+++ b/drivers/clocksource/timer-rtl-otto.c
@@ -56,37 +56,37 @@ struct rttm_cs {
 /* Simple internal register functions */
 static inline unsigned int rttm_get_counter(void __iomem *base)
 {
-	return ioread32(base + RTTM_CNT);
+	return __raw_readl(base + RTTM_CNT);
 }
 
 static inline void rttm_set_period(void __iomem *base, unsigned int period)
 {
-	iowrite32(period, base + RTTM_DATA);
+	__raw_writel(period, base + RTTM_DATA);
 }
 
 static inline void rttm_disable_timer(void __iomem *base)
 {
-	iowrite32(0, base + RTTM_CTRL);
+	__raw_writel(0, base + RTTM_CTRL);
 }
 
 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor)
 {
-	iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL);
+	__raw_writel(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL);
 }
 
 static inline void rttm_ack_irq(void __iomem *base)
 {
-	iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT);
+	__raw_writel(__raw_readl(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT);
 }
 
 static inline void rttm_enable_irq(void __iomem *base)
 {
-	iowrite32(RTTM_INT_ENABLE, base + RTTM_INT);
+	__raw_writel(RTTM_INT_ENABLE, base + RTTM_INT);
 }
 
 static inline void rttm_disable_irq(void __iomem *base)
 {
-	iowrite32(0, base + RTTM_INT);
+	__raw_writel(0, base + RTTM_INT);
 }
 
 /* Aggregated control functions for kernel clock framework */