Re: [RFC v2] arm,x86,fs/resctrl: Generic schema description Proof of Concept

[Chen Yu]

On Thu, Aug 13, 2026 at 08:19:38AM -0700, Reinette Chatre wrote:
> On 8/13/26 6:59 AM, Chen Yu wrote:
> > diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
> > index cac4b3293cef..ab7d3fa3f337 100644
> > --- a/fs/resctrl/rdtgroup.c
> > +++ b/fs/resctrl/rdtgroup.c
> > @@ -124,7 +124,7 @@ void rdt_staged_configs_clear(void)
> >                         if (list_empty(&ctrl->emulated_by))
> >                                 continue;
> >                         list_for_each_entry(em_ctrl, &ctrl->emulated_by, entry) {
> > -                               list_for_each_entry_rcu(dom, &ctrl->domains, hdr.list, lockdep_is_cpus_held())
> > +                               list_for_each_entry_rcu(dom, &em_ctrl->domains, hdr.list, lockdep_is_cpus_held())
> >                                         memset(dom->staged_config, 0, sizeof(dom->staged_config));
> >                         }
> >                 }
> Thank you very much. Squashed and available in branch resctrl/controls_rfc_v2.2
>

:) Another minor one
otherwise a schemata write on Haswell would only update rdt_hw_ctrl_domain::ctrl_val[]
and never reach MSR_IA32_L3_CBM_BASE.

--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -175,6 +175,10 @@ static inline void cache_alloc_hsw_probe(void)
 	hw_ctrl->r_ctrl.bitmap.cbm_len = 20;
 	hw_ctrl->r_ctrl.bitmap.shareable_bits = 0xc0000;
 	hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 2;
+
+	hw_ctrl->msr_base = MSR_IA32_L3_CBM_BASE;
+	hw_ctrl->hw_update = cat_wrmsr;
+
 	list_add(&hw_ctrl->r_ctrl.entry, &r->controls);
 
 	hw_res->num_closid = 4;

thanks,
Chenyu