[PATCH v5 1/3] iio: pressure: dps310: fix CFG_REG bit definitions

[Rupesh Majhi]

Three of the CFG_REG bit defines do not match the datasheet. P_SHIFT is
bit 2, FIFO_EN is bit 1 and SPI_MODE is bit 0, but the driver defines them
as BIT(4), BIT(5) and BIT(6). Those three positions are INT_PRS, INT_TMP
and INT_FIFO, the measurement ready and FIFO full interrupt enables for the
SDO pin. All three have had the wrong value since the driver was added,
when only the temperature shift bit had a user.

DPS310_PRS_SHIFT_EN got its first user when pressure support was added, and
there it is a real bug. The datasheet requires the pressure result
bit-shift to be enabled when the oversampling rate is higher than 8 times,
so dps310_set_pres_precision() sets it for oversampling ratios of 16 and
above. With the wrong definition it leaves P_SHIFT clear and toggles the
pressure ready interrupt instead. The result register is then never
shifted, so it no longer matches the scale factor the compensation divides
by. On a DPS310 breakout, reading in_pressure_input at oversampling 16, 32
and 64 returns -ERANGE, because dps310_calculate_pressure() ends up
negative. Oversampling 128 was not observed to be affected.

DPS310_FIFO_EN and DPS310_SPI_EN still have no users, so correcting them
changes nothing on its own, but the FIFO enable is needed by the hardware
FIFO support later in this series.

Temperature is not affected, T_SHIFT is bit 3 and DPS310_TMP_SHIFT_EN
already matches it.

Fixes: ba6ec48e76bc ("iio: Add driver for Infineon DPS310")
Fixes: d711a3c7dc82 ("iio: dps310: Add pressure sensing capability")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Rupesh Majhi <zoone.rupert@xxxxxxxxx>
---
 drivers/iio/pressure/dps310.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/pressure/dps310.c b/drivers/iio/pressure/dps310.c
index f45af72a0554..68382960382f 100644
--- a/drivers/iio/pressure/dps310.c
+++ b/drivers/iio/pressure/dps310.c
@@ -50,9 +50,9 @@
 #define DPS310_CFG_REG		0x09
 #define  DPS310_INT_HL		BIT(7)
 #define  DPS310_TMP_SHIFT_EN	BIT(3)
-#define  DPS310_PRS_SHIFT_EN	BIT(4)
-#define  DPS310_FIFO_EN		BIT(5)
-#define  DPS310_SPI_EN		BIT(6)
+#define  DPS310_PRS_SHIFT_EN	BIT(2)
+#define  DPS310_FIFO_EN		BIT(1)
+#define  DPS310_SPI_EN		BIT(0)
 #define DPS310_RESET		0x0c
 #define  DPS310_RESET_MAGIC	0x09
 #define DPS310_COEF_BASE	0x10
-- 
2.43.0