[PATCH v4 0/7] Add syscon support for Renesas RZ/T2H & RZ/N2H in CPG/MSSR driver

From: Prabhakar

Date: Mon Aug 17 2026 - 15:29:16 EST


From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Hi All,

This series adds syscon support for the Renesas RZ/T2H and RZ/N2H SoCs
in the CPG/MSSR driver. The CPG/MSSR block on these SoCs is a
multi-function block that integrates several system-level features beyond
clock and reset control, including clock monitoring, write protection,
and peripheral configuration registers.

For the other IP blocks to be configured a syscon support is provided in
the CPG/MSSR driver. This allows other drivers to access the CPG/MSSR
registers via a regmap interface.

Note:
- Patches have been rebased on top of next-20260817 + renesas-dts-for-v7.4 +
renesas-clk-for-v7.4.
- The WDT driver patches apply on top of series [0].

[0] https://lore.kernel.org/all/20260814191415.2110732-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/


v3->v4:
- Dropped DT binding patch that split up the renesas,cpg-mssr.yaml file
- Dropped RZT2H_SYSC_BASE macro
- Added array of base pointers to the r9a09g077_sysc_reg struct to
support multiple SYSC regions
- Merged r9a09g077_writeable_readable_sysc0 and
r9a09g077_writeable_readable_sysc1 into a single function
that checks the SYSC block and offset to determine if the register is
readable/writable.
- Added RZT2H_CPG_REG_SIZE macro
- Updated r9a09g077_post_init() to call of_address_to_resource() to check
the size of the mapped CPG register regions
- Dropped changes from cpg_mssr_common_init

v2->v3:
- Switched to non-RFC patches for the series.
- Added new patch to split out the RZ/T2H CPG binding from the generic
Renesas CPG/MSSR binding.
- Dropped WDT driver refactor changes from this series. These has be
submitted in a separate series which makes use of regmap.
- Dropped registers from writeable_readable list.
- Renamed sysc_init to post_init and updated signature to take
cpg_mssr_pub struct.
- Created a single regmap covering both SYSC register regions
instead of two separate regmaps.
- Updated commit messages

v1->v2:
https://lore.kernel.org/all/20260702123112.161160-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
- Updated commit message for patch #1
- Made use of for_each_child_of_node_scoped
- Moved sysc_init() to the end of the probe function

v1: https://lore.kernel.org/all/20260511185058.1926869-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/

Cheers,
Prabhakar

Lad Prabhakar (7):
clk: renesas: r9a09g077: Register SYSC regmap
arm64: dts: renesas: r9a09g077: Adjust CPG register region sizes
arm64: dts: renesas: r9a09g087: Adjust CPG register region sizes
dt-bindings: watchdog: renesas,r9a09g057-wdt: Add CPG/MSSR syscon
support
watchdog: rzv2h: Add syscon support for WDTDCR
arm64: dts: renesas: r9a09g077: Use CPG/MSSR syscon for WDTDCR access
arm64: dts: renesas: r9a09g087: Use CPG/MSSR syscon for WDTDCR access

.../watchdog/renesas,r9a09g057-wdt.yaml | 29 +++-
arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 28 ++--
arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 28 ++--
drivers/clk/renesas/Kconfig | 2 +
drivers/clk/renesas/r9a09g077-cpg.c | 140 ++++++++++++++++++
drivers/clk/renesas/renesas-cpg-mssr.c | 3 +
drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
drivers/watchdog/Kconfig | 1 +
drivers/watchdog/rzv2h_wdt.c | 56 +++++--
9 files changed, 247 insertions(+), 41 deletions(-)

--
2.43.0