Re: [PATCH v15 18/22] media: i2c: maxim-serdes: add MAX9296A driver

From: Artur Andrzejczak

Date: Mon Aug 17 2026 - 17:52:18 EST


On Fri Aug 7, 2026 at 3:02 PM CEST, Dumitru Ceclan wrote:
> [...]

max9296a_set_tpg_clk() writes MAX9296A_VPRBS(0). The comment states TPG
data always lands on pipe 0, but don't pipe_hw_ids start at 1 on
MAX96714/96714F/96716A/96792A, with hw pipe 0 never mapped?
max9626a_log_pipe_status() already reads VPRBS through
max9296a_pipe_id(). Should this write use the accessor too? Also, is the
"max9626a" in that function name a typo? The file header and
MODULE_DESCRIPTION say "Quad GMSL2 Deserializer", but isn't this a
dual-link chip?

As in patch 17: could the 200 ms sleep in max9296a_select_links() poll
link lock status instead?

max9296a_init_phy() enables D-PHY deskew when dpll_freq > 1.5 GHz
without checking for C-PHY (max96724.c gates this on !is_cphy). This
might affect MAX96716A/96792A.

Kind Regards,
Artur Andrzejczak