[PATCH v2 1/3] dt-bindings: interconnect: Add Qualcomm CAMNOC ICC binding

[Atanas Filipov]

Add binding for the Qualcomm CAMNOC interconnect provider. CAMNOC is
the internal AXI interconnect within the camera subsystem. Multiple
sub-devices share CAM_CC_CAMNOC_AXI_CLK; the ICC provider aggregates
their bandwidth votes and scales the clock accordingly, avoiding the
last-writer-wins race from direct clk_set_rate() calls.

Signed-off-by: Atanas Filipov <atanas.filipov@xxxxxxxxxxxxxxxx>
---
 .../bindings/interconnect/qcom,camnoc.yaml    | 124 ++++++++++++++++++
 .../dt-bindings/interconnect/qcom,camnoc.h    |  52 ++++++++
 2 files changed, 176 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml
 create mode 100644 include/dt-bindings/interconnect/qcom,camnoc.h

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml b/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml
new file mode 100644
index 000000000000..b2659db2cf27
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml
@@ -0,0 +1,124 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,camnoc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Camera NOC (CAMNOC) Interconnect Provider
+
+maintainers:
+  - Atanas Filipov <atanas.filipov@xxxxxxxxxxxxxxxx>
+
+description:
+  The Camera Network-on-Chip (CAMNOC) is the internal AXI interconnect
+  within the Qualcomm camera subsystem. It arbitrates AXI bandwidth
+  between camera sub-devices (IFE, JPEG, BPS, IPE, etc.) and the external
+  memory interconnect. Multiple consumers may independently request
+  bandwidth via icc_set_bw(); the CAMNOC ICC provider aggregates all active
+  votes and scales CAM_CC_CAMNOC_AXI_CLK accordingly, avoiding the
+  last-writer-wins race that arises when each consumer calls clk_set_rate()
+  directly on the shared clock.
+
+  Each camera sub-device driver that shares the CAMNOC AXI clock should
+  obtain an ICC path from its master port to SLAVE_CAMNOC_AXI and vote for
+  bandwidth using the port IDs defined in
+  include/dt-bindings/interconnect/qcom,camnoc.h.
+
+properties:
+  compatible:
+    enum:
+      - qcom,sm8250-cam-virt
+
+  clocks:
+    items:
+      - description: CAMNOC AXI clock
+
+  clock-names:
+    items:
+      - const: camnoc_axi
+
+  '#interconnect-cells':
+    const: 1
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+  - '#interconnect-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,camcc-sm8250.h>
+    #include <dt-bindings/interconnect/qcom,camnoc.h>
+
+    /* CAMNOC ICC provider node */
+    cam_virt: interconnect-cam-virt {
+        compatible = "qcom,sm8250-cam-virt";
+        clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>;
+        clock-names = "camnoc_axi";
+        #interconnect-cells = <1>;
+    };
+
+    /*
+     * Simple consumer example: IFE sub-device voting for CAMNOC bandwidth
+     * directly via icc_set_bw().
+     */
+    camera-ife@0 {
+        reg = <0x0 0x1000>;
+
+        interconnects = <&cam_virt MASTER_CAMNOC_IFE_0
+                         &cam_virt SLAVE_CAMNOC_AXI>;
+        interconnect-names = "camnoc";
+    };
+
+    /*
+     * OPP-based consumer example: JPEG encoder driving its CAMNOC bandwidth
+     * vote from the same OPP entry that selects its core clock rate and
+     * RPMh performance state. opp-peak-kBps is the minimum CAMNOC bandwidth
+     * required at each operating point; the actual value depends on the
+     * target resolution and quality settings.
+     *
+     * opp-hz refers to the JPEG dedicated core clock rate. All shared
+     * clocks (e.g. CAMNOC AXI) are managed by the ICC framework so that
+     * votes from multiple consumers are aggregated before the rate is
+     * applied to the hardware.
+     */
+    camera-jpeg@ac53000 {
+        reg = <0x0ac53000 0x1000>;
+
+        interconnects = <&cam_virt MASTER_CAMNOC_JPEG
+                         &cam_virt SLAVE_CAMNOC_AXI>;
+        interconnect-names = "camnoc";
+
+        operating-points-v2 = <&jpeg_opp_table>;
+
+        jpeg_opp_table: opp-table {
+            compatible = "operating-points-v2";
+
+            opp-100000000 {
+                opp-hz = /bits/ 64 <100000000>;
+                opp-peak-kBps = <22246>;
+                required-opps = <&rpmhpd_opp_min_svs>;
+            };
+
+            opp-200000000 {
+                opp-hz = /bits/ 64 <200000000>;
+                opp-peak-kBps = <44492>;
+                required-opps = <&rpmhpd_opp_low_svs>;
+            };
+
+            opp-400000000 {
+                opp-hz = /bits/ 64 <400000000>;
+                opp-peak-kBps = <88983>;
+                required-opps = <&rpmhpd_opp_svs>;
+            };
+
+            opp-480000000 {
+                opp-hz = /bits/ 64 <480000000>;
+                opp-peak-kBps = <106780>;
+                required-opps = <&rpmhpd_opp_svs_l1>;
+            };
+        };
+    };
diff --git a/include/dt-bindings/interconnect/qcom,camnoc.h b/include/dt-bindings/interconnect/qcom,camnoc.h
new file mode 100644
index 000000000000..9b6468f852ec
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,camnoc.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H
+
+/*
+ * CAMNOC master port IDs for SM8250 (Kona).
+ * Each ID identifies a camera sub-device that can vote for CAMNOC AXI
+ * bandwidth via icc_set_bw().  Only ports wired on this SoC are listed.
+ */
+
+/* Image Front End */
+#define MASTER_CAMNOC_IFE_0		0
+#define MASTER_CAMNOC_IFE_0_RDI		1
+#define MASTER_CAMNOC_IFE_1		2
+#define MASTER_CAMNOC_IFE_1_RDI		3
+#define MASTER_CAMNOC_IFE_LITE_0	4
+#define MASTER_CAMNOC_IFE_LITE_1	5
+#define MASTER_CAMNOC_IFE_LITE_2	6
+#define MASTER_CAMNOC_IFE_LITE_3	7
+#define MASTER_CAMNOC_IFE_LITE_4	8
+
+/* Bayer Processing Segment */
+#define MASTER_CAMNOC_BPS		9
+
+/* Image Processing Engine */
+#define MASTER_CAMNOC_IPE_0		10
+#define MASTER_CAMNOC_IPE_1		11
+
+/* JPEG encoder and DMA */
+#define MASTER_CAMNOC_JPEG		12
+#define MASTER_CAMNOC_JPEG_DMA		13
+
+/* Camera Data Mover */
+#define MASTER_CAMNOC_CDM		14
+
+/* Face Detection */
+#define MASTER_CAMNOC_FD		15
+
+/* Sensor Bayer Interface */
+#define MASTER_CAMNOC_SBI		16
+
+/* Image Control Processor */
+#define MASTER_CAMNOC_ICP		17
+
+/* CAMNOC AXI slave (single exit point to external interconnect) */
+#define SLAVE_CAMNOC_AXI		18
+
+#endif /* __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H */
-- 
2.34.1