Re: [PATCH 1/2] dt-bindings: misc: introduce pci1179,0220.yaml
From: Alex Elder
Date: Thu Aug 20 2026 - 13:25:20 EST
On 8/16/26 9:43 PM, Rob Herring wrote:
On Thu, Aug 13, 2026 at 05:29:41PM -0500, Alex Elder wrote:
Define the binding for the Toshiba TC9564 PCI endpoint function device.
The third downstream PCIe switch port within this chip has an embedded
PCIe controller, and that implements two of these PCIe functions.
A better subject would be "dt-bindings: misc: Add Toshiba PC9564
endpoint functon device".
OK. And yes, I'll do a better job explaining that the TC9564
is (to the best of my knowledge) also sold (but re-branded)
as the Qualcomm QPS615. I'll see if Qualcomm has a particular
wording they'd prefer.
Thanks.
-Alex
Signed-off-by: Daniel Thompson <daniel@xxxxxxxxxxxx>
Signed-off-by: Alex Elder <elder@xxxxxxxxxxxx>
---
.../bindings/misc/pci1179,0220.yaml | 150 ++++++++++++++++++
MAINTAINERS | 6 +
2 files changed, 156 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/pci1179,0220.yaml
diff --git a/Documentation/devicetree/bindings/misc/pci1179,0220.yaml b/Documentation/devicetree/bindings/misc/pci1179,0220.yaml
new file mode 100644
index 0000000000000..30a76f377eec8
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/pci1179,0220.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/pci1179,0220.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba TC9564 internal PCI endpoint function
+
+maintainers:
+ - Alex Elder <elder@xxxxxxxxxx>
+ - Daniel Thompson <danielt@xxxxxxxxxx>
+
+description: >
+ The Toshiba TC9564 is specialized SoC that implements a PCIe switch
+ as well as an Ethernet AVB/TSN bridge. In addition to these, the SoC
+ implements other functions, including a reset and clock controller,
+ an address translation unit, and a few other devices.
+
+ The PCI switch has three downstream ports. The first two are exposed
+ externally, while the third is used by an internal PCIe endpoint. The
+ internal endpoint implements two PCIe functions, and attached to each
+ of these is a 10 Gbps capable Synopsys Ethernet controller and an
+ interrupt controller that converts internal "wired" interrupts into
+ MSIs delivered to the host.
+
+ PCIe BARs provide access to registers that manage almost all IP blocks.
+ The SoC is modeled using a PCI endpoint bus. The IP blocks are bound
+ to platform drivers that access the hardware using MMIO through the
+ PCI BARs.
+
+ ------------------------------------
+ | Host |
+ -----........---------------...-----
+ | | | |
+ | PCIe | |I2C|
+ | | | |
+ ----------+........+-------------+...+---------------------------
+ | |upstream| | | ---------------- |
+ | Toshiba | Port 0 | | +-----+ PCIe pwrctrl | |
+ | TC9564 ----++---- | I2C | ---------------- |
+ | SoC || |controller| ---------------- |
+ | || | +-----+ GPIO | |
+ | || | | | controller | |
+ | ------++------ ------------ ---------------- |
+ | | US | |
+ | | | ------------------------------------- |
+ | | DS3+====+ downstream port 3 | |
+ | | | |-----------------------------------| |
+ | | PCIe | | embedded PCIe endpoint | |
+ | | | |~~~~~~~~~~~~~~~~~+~~~~~~~~~~~~~~~~~| |
+ | | Switch | | PCIe function 0 | PCIe function 1 | |
+ | | | |-----------------+-----------------| |
+ | | | | BAR | | BAR | | BAR | |
+ | | | | 0 | | 4 | | 4 | |
+ | | DS1 DS2 | ----.---- ----.---- ----.---- |
+ | --++------++-- : ...: :... |
+ | || || : : : ------- : | |
+ | || || -------.--- -.- :...|clock| : -.- |
+ | || || |translate| |M| : ------- : |M| |
+ | || || ----------- |S| : : |S| |
+ | || || |I| : ------- : |I| |
+ | || || |G| :...|reset| : |G| |
+ | || || |E| : ------- : |E| |
+ | --------++-- --++-------- |N| : : |N| |
+ | |downstream| |downstream| ------.---- ------.---- |
+ | | port 1 | | port 2 | | XGMAC 0 | | XGMAC 1 | |
+ --+..........+--+..........+-------+.......+---------+.....+-----
+ | | | |
+ |USXGMII| |SGMII|
+ | | | |
+ ---+.....+--- --+.....+--
+ | Ethernet | | Ethernet|
+ | PHY | | PHY |
+ ------------- -----------
+
+allOf:
+ - $ref: /schemas/pci/pci-ep-bus.yaml
+
+properties:
+ compatible:
+ const: pci1179,0220 # Toshiba TC96564 (a.k.a. Qualcomm QPS615)
Perhaps somewhere besides a comment say what the relationship to a
Qualcomm device is.
Rob