[PATCH v2 1/3] arm64: dts: imx95: Avoid 32-bit PCIe window System RAM overlap
From: hongxing . zhu
Date: Fri Aug 21 2026 - 01:39:57 EST
From: Richard Zhu <hongxing.zhu@xxxxxxx>
Move the PCIe non-prefetchable memory PCI bus address from 0xe0000000
to 0x10000000 to avoid overlap with DRAM. The 0x10000000 range is
reserved and safe to use.
Fixes: dbecf38e60d4e ("arm64: dts: imx95: Correct PCIe outbound address space configuration")
Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 38fc47024841f..0f03b85aaec17 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1948,7 +1948,7 @@ pcie0: pcie@4c300000 {
<0 0x4c340000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x43000000 0x9 0x00000000 0x9 0x00000000 0x0 0xe0000000>,
- <0x82000000 0x0 0xe0000000 0x9 0xe0000000 0x0 0x10000000>,
+ <0x82000000 0x0 0x10000000 0x9 0xe0000000 0x0 0x10000000>,
<0x81000000 0x0 0x00000000 0x9 0xf0000000 0x0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
@@ -2039,7 +2039,7 @@ pcie1: pcie@4c380000 {
<0 0x4c3c0000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x43000000 0xa 0x00000000 0xa 0x00000000 0x0 0xe0000000>,
- <0x82000000 0x0 0xe0000000 0xa 0xe0000000 0x0 0x10000000>,
+ <0x82000000 0x0 0x10000000 0xa 0xe0000000 0x0 0x10000000>,
<0x81000000 0x0 0x00000000 0xa 0xf0000000 0x0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
base-commit: eba4724641990bd9975ca10ababe726b6143f0b6
--
2.34.1