Re: [PATCH v4 13/21] iommu/riscv: Preserve MSI IOVA state across domain replacement
From: Andrew Jones
Date: Fri Aug 21 2026 - 09:56:57 EST
On Fri, Aug 21, 2026 at 10:22:52AM -0300, Jason Gunthorpe wrote:
> On Fri, Aug 21, 2026 at 01:14:39PM +0200, Andrew Jones wrote:
> > On Thu, Aug 20, 2026 at 06:52:04PM -0300, Jason Gunthorpe wrote:
> > > On Thu, Aug 20, 2026 at 11:41:42PM +0200, Andrew Jones wrote:
> > > > MSI IOVAs belong to a paging domain, but iommufd may replace a device's
> > > > domain while its interrupts remain allocated. Waiting for another IRQ
> > > > allocation to populate the new table would leave existing interrupts
> > > > without valid MSI IOVAs.
> > >
> > > ???
> > >
> > > iommufd is supposed to handle all of this itself, that is what commit
> > > 40f5175d0eb7 ("iommufd: Implement sw_msi support natively")
> > >
> > > is doing?
> > >
> > > The whole point of that commit was so drivers don't have to deal with
> > > this at all.
> > >
> >
> > This driver relies on that support. iommufd installs all required MSI
> > mappings in the incoming HWPT before attach. The additional driver work
> > is to populate the PA-to-IOVA lookup table riscv needs in MSI composition
> > on IRQ affinity changes.
>
> So it is all because some of the MSI state got leaked into the iommu
> driver? I do not like it :)
>
It's a cache of the MSI target IOVAs, rather than MSI state itself. But
the batched API lets the descriptor cache one IOVA base, so msi_iova[]
and its maintenance can go. I'll rework that for the next version.
Thanks,
drew