[PATCH] arm64: dts: rockchip: route ES8388 MCLK to the IO pin on Orange Pi 5/5B

[Richard DeFrese]

The on-board ES8388 codec on the Orange Pi 5 and 5B has no analog output:
the codec's master clock (MCLK) never reaches its pin.

RK3588 gates the I2S MCLK-to-IO routing in SYS_GRF SOC_CON6 (bit 1 for
I2S1), exposed as I2S1_8CH_MCLKOUT_TO_IO. The codec references the internal
mux (I2S1_8CH_MCLKOUT) instead, so nothing enables the IO gate: the
12.288 MHz MCLK is generated inside the SoC but never driven out to the
codec. With the ES8388 as I2S bit/frame master, the SoC I2S controller then
never receives a valid clock and aborts:

  rockchip-i2s-tdm fe480000.i2s: clear failed, reset txrx

Point the codec's "clocks" at I2S1_8CH_MCLKOUT_TO_IO so the ES8388 driver
enables the gate in clk_prepare_enable() at probe; "assigned-clocks" stays
on I2S1_8CH_MCLKOUT to keep the 12.288 MHz rate.

Signed-off-by: Richard DeFrese <richard.defrese@xxxxxxxxx>
---
 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
index 6e081bc06..5ac3e0d9d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
@@ -87,7 +87,7 @@ &i2c6 {
 	es8388: audio-codec@10 {
 		compatible = "everest,es8388", "everest,es8328";
 		reg = <0x10>;
-		clocks = <&cru I2S1_8CH_MCLKOUT>;
+		clocks = <&cru I2S1_8CH_MCLKOUT_TO_IO>;
 		AVDD-supply = <&vcca_3v3_s0>;
 		DVDD-supply = <&vcca_1v8_s0>;
 		HPVDD-supply = <&vcca_3v3_s0>;
-- 
2.53.0