Re: [PATCH v2 2/2] cxl/core: Skip non-CXL capabilities in MCAP
From: engguopeng
Date: Mon Aug 24 2026 - 23:42:23 EST
On Fri, 21 Aug 2026 19:01:22 +0100
Jonathan Cameron <jic23@xxxxxxxxxx> wrote:
> Hi Penn,
>
> I'm a bit lost to what is going on here. So bare with me!
> I think the upshot of the following is we need a little more info
> in this patch description.
>
> If the problem you describe was 'real' then we'd have a backwards
> compatibility bug in the CXL spec and those folk are normally
> pretty good at catching those!
>
> To someone who doesn't know how MCAP and CXL were made compatible
> (or like me forgot!) it isn't obvious that the non CXL capabilities
> can turn up via the CXL capabilities structures - having reread
> the spec sections I'm not sure they can.
>
> A reference + some text from the implementation note in CXL v4.0 8.2.9
> CXL Device Register Interface would be helpful. The picture in
> Figure 8-12 for instance implies you should never see non CXL caps
> headers via the the CXL register block path.
>
> You are allowed to alias the destinations of the (sort of) pointers
> in the capabilities array, but not the header with the pointers
> in it.
>
Hi Jonathan,
Thanks for the detailed review.
I need to revisit the relevant specification sections and investigate the
details more carefully.
Please consider this patch series withdrawn for now.
Best regards,
Penn