Re: [PATCH] i2c: imx-lpi2c: avoid accessing target registers on master-only controllers
From: Andi Shyti
Date: Thu Aug 27 2026 - 21:06:57 EST
Hi Carlos,
On Mon, Aug 03, 2026 at 11:27:05AM +0800, carlos.song@xxxxxxxxxxx wrote:
> From: Carlos Song <carlos.song@xxxxxxx>
>
> Not all LPI2C controller instances implement the Target block.
> Since commit 90311787f483 ("i2c: imx-lpi2c: reset controller in
> probe stage"), the driver unconditionally resets both the Master
> and Target blocks during probe.
>
> On controllers that do not support target mode, accessing the
> Target registers triggers an asynchronous SError and prevents the
> driver from probing successfully. For example on i.MX8QM:
>
> SError Interrupt on CPU2, code 0x00000000bf000002 -- SError
> Hardware name: Freescale i.MX8QM MEK (DT)
> pc : lpi2c_imx_probe+0x280/0x594
> lr : lpi2c_imx_probe+0x224/0x594
> Kernel panic - not syncing: Asynchronous SError Interrupt
>
> The VERID register is implemented in the Master block and can be
> safely accessed on all controller variants. Its FEATURE field
> indicates whether target mode is supported.
>
> Read VERID during probe and use it to determine whether the
> Target block is present. Only access Target registers when target
> mode is supported and reject target registration requests with
> -EOPNOTSUPP otherwise.
>
> Fixes: 90311787f483 ("i2c: imx-lpi2c: reset controller in probe stage")
> Signed-off-by: Carlos Song <carlos.song@xxxxxxx>
pushed to i2c/i2c-fixes.
Thanks,
Andi