Re: [PATCH v2 1/5] PCI: endpoint: Add DMA auxiliary resource metadata

From: Frank Li

Date: Fri Aug 28 2026 - 14:50:51 EST


On Sat, Aug 29, 2026 at 02:09:28AM +0900, Koichiro Den wrote:
> Endpoint functions that export controller-local DMA channels need the
> controller register and descriptor-memory layout.
>
> Add DMA control and descriptor-memory resource types. The control resource
> carries the register layout and channel counts. Each descriptor region is
> associated with the static channel ID assigned by the local DMA driver.
>
> Signed-off-by: Koichiro Den <den@xxxxxxxxxxxxx>
> ---

Reviewed-by: Frank Li <Frank.Li@xxxxxxx>

> Changes in v2:
> - Rework PCI DMA EPF v7 patch 3 with only the metadata needed by vNTB.
> https://lore.kernel.org/r/20260813063757.3131865-4-den@xxxxxxxxxxxxx/
> - Keep descriptor metadata keyed only by static channel IDs. (Frank)
> https://lore.kernel.org/r/lm7tadnxsyrypu4mypptlkx5qkytex4qxsijdr5ydud2n3anvf@yakjfjg5ng4u/
>
> include/linux/pci-epc.h | 34 +++++++++++++++++++++++++++++++---
> 1 file changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
> index f247cf9bcf1a..e0348e7bc534 100644
> --- a/include/linux/pci-epc.h
> +++ b/include/linux/pci-epc.h
> @@ -65,6 +65,8 @@ struct pci_epc_map {
> * enum pci_epc_aux_resource_type - auxiliary resource type identifiers
> * @PCI_EPC_AUX_DOORBELL_MMIO: Doorbell MMIO, that might be outside the DMA
> * controller register window
> + * @PCI_EPC_AUX_DMA_CTRL_MMIO: DMA controller MMIO register window
> + * @PCI_EPC_AUX_DMA_DESC_MEM: DMA descriptor memory
> *
> * EPC backends may expose auxiliary blocks (e.g. DMA engines) by mapping their
> * register windows and descriptor memories into BAR space. This enum
> @@ -72,13 +74,25 @@ struct pci_epc_map {
> */
> enum pci_epc_aux_resource_type {
> PCI_EPC_AUX_DOORBELL_MMIO,
> + PCI_EPC_AUX_DMA_CTRL_MMIO,
> + PCI_EPC_AUX_DMA_DESC_MEM,
> };
>
> /**
> - * struct pci_epc_aux_resource - a physical auxiliary resource that may be
> - * exposed for peer use
> + * enum pci_epc_aux_dma_reg_layout - DMA controller register layout
> + * @PCI_EPC_AUX_DMA_REG_LAYOUT_UNKNOWN: unknown or uninitialized layout
> + * @PCI_EPC_AUX_DMA_REG_LAYOUT_DW_EDMA: Synopsys DesignWare eDMA/HDMA layout
> + */
> +enum pci_epc_aux_dma_reg_layout {
> + PCI_EPC_AUX_DMA_REG_LAYOUT_UNKNOWN = 0,
> + PCI_EPC_AUX_DMA_REG_LAYOUT_DW_EDMA,
> +};
> +
> +/**
> + * struct pci_epc_aux_resource - an auxiliary resource that may be exposed for
> + * peer use
> * @type: resource type, see enum pci_epc_aux_resource_type
> - * @phys_addr: physical base address of the resource
> + * @phys_addr: CPU physical base address of an MMIO resource
> * @size: size of the resource in bytes
> * @bar: BAR number where this resource is already exposed to the RC
> * (NO_BAR if not)
> @@ -99,6 +113,20 @@ struct pci_epc_aux_resource {
> int irq; /* IRQ number for the doorbell handler */
> u32 data; /* write value to ring the doorbell */
> } db_mmio;
> +
> + /* PCI_EPC_AUX_DMA_CTRL_MMIO */
> + struct {
> + enum pci_epc_aux_dma_reg_layout reg_layout;
> + u32 reg_layout_data;
> + u16 ep_to_rc_ch_cnt;
> + u16 rc_to_ep_ch_cnt;
> + } dma_ctrl;
> +
> + /* PCI_EPC_AUX_DMA_DESC_MEM */
> + struct {
> + dma_addr_t dma_addr; /* Endpoint-local DMA address */
> + u16 chan_id;
> + } dma_desc;
> } u;
> };
>
> --
> 2.51.0
>