Re: [PATCH 8/9] arm64: dts: qcom: ipq8074: Flatten usb controller nodes
From: Krishna Kurapati
Date: Sat Aug 29 2026 - 12:42:26 EST
On 8/25/2026 4:12 PM, George Moussalem via B4 Relay wrote:
From: George Moussalem <george.moussalem@xxxxxxxxxxx>
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
In addition, fix indentation of properties in both nodes.
Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 112 ++++++++++++++++------------------
1 file changed, 52 insertions(+), 60 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 75a5ae30d966..d4a86b3815f2 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -625,104 +625,96 @@ qpic_nand: nand-controller@79b0000 {
status = "disabled";
};
- usb_0: usb@8af8800 {
- compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ usb_0: usb@8a00000 {
+ compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
- <133330000>,
- <19200000>;
+ <133330000>,
+ <19200000>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"ss_phy_irq";
power-domains = <&gcc USB0_GDSC>;
+ phys = <&qusb_phy_0>, <&ssphy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ snps,parkmode-disable-ss-quirk;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+
I see this controller is DRD capable. Move this property to platform DTS if dr_mode is needed as host.
resets = <&gcc GCC_USB0_BCR>;
- status = "disabled";
[...]
+ usb_1: usb@8c00000 {
+ compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3";
+ reg = <0x08c00000 0xfc100>;
clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
- <&gcc GCC_USB1_MASTER_CLK>,
- <&gcc GCC_USB1_SLEEP_CLK>,
- <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_SLEEP_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
<&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
- <133330000>,
- <19200000>;
+ <133330000>,
+ <19200000>;
- interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"ss_phy_irq";
power-domains = <&gcc USB1_GDSC>;
+ phys = <&qusb_phy_1>, <&ssphy_1>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ snps,parkmode-disable-ss-quirk;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+
Same comment as above.
Regards,
Krishna,