Re: [PATCH v6 5/8] riscv_cbqri: resctrl: Add cache allocation via capacity block mask

[Chen Pei]

Hi Drew,

Thanks for keeping this series alive. While testing v6 on a RISC-V
platform with a CBQRI capacity controller (8 capacity blocks backing
one L3, Ssqosid + CBQRI exposed via DT), I hit a problem that traces
back to this patch; findings and a suggested fix below.

Symptom
-------
With the series applied, the resctrl interface reports an empty
capacity mask everywhere:

  # cat /sys/fs/resctrl/info/L3/cbm_mask
  0
  # cat /sys/fs/resctrl/schemata
  L3:0=0
  # cat /sys/fs/resctrl/size
  L3:0=0

while the hardware reports NCBLKS=8 in the CC capabilities register
(bits[23:8] of cc_capabilities, per CBQRI v1.0 §3.5), i.e. the
expected values are cbm_mask=ff / L3:0=ff.

Root cause
----------
cbqri_resctrl_control_init() fills cbm_len/shareable_bits/min_cbm_bits
but never initializes res->default_ctrl, which therefore stays 0
(static storage):

> +static int cbqri_resctrl_control_init(struct cbqri_cache *ctrl,
> +				      struct rdt_resource *res)
> +{
> +	res->name = kasprintf(...);
> +	res->cache.cbm_len = ctrl->cc.ncblks;
> +	res->cache.shareable_bits = 0;
> +	...

Two visible consequences, both matching the symptom exactly:

1. info/L3/cbm_mask is a direct view of r->default_ctrl
   (rdt_default_ctrl_show()), hence 0.
2. cbqri_init_domain_ctrlval() seeds every RCID's CONFIG_LIMIT from
   resctrl_get_default_ctrl(), i.e. it programs a zero capacity mask
   for all RCIDs (including RCID 0 used by all harts by default); the
   hardware then reads back 0, hence schemata/size show L3:0=0.

For comparison, the x86 resctrl code initializes the default to the
full mask (arch/x86/kernel/cpu/resctrl/core.c: r->default_ctrl =
max_cbm), and an earlier out-of-tree RISC-V CBQRI implementation did
the equivalent (res->default_ctrl = BIT_MASK(ncblks) - 1). It looks
like that initialization was lost in the rework.

Suggested fix
-------------
Initialize the default control to the full capacity mask in
cbqri_resctrl_control_init(), e.g.:

	res->default_ctrl = BIT_MASK(ctrl->cc.ncblks) - 1;

right after res->cache.cbm_len is set. With this one line, cbm_mask
shows ff, schemata/size show L3:0=ff, and writing schemata round-trips
correctly.

Best regards,
Pei