[PATCH v3 1/5] riscv: dts: spacemit: k3: move USB3 phy to board level

From: Aurelien Jarno

Date: Mon Aug 31 2026 - 00:46:18 EST


On the SpacemiT K3 SoC, the combo phy provides 8 lines that can
either be used for PCIe or USB3, depending on its configuration
(spacemit,apmu). This configuration is defined at the board level, and
assigning a phy line to a USB3 controller while it is configured as PCIe
results in an "Invalid PHY mode" error.

Move the USB phy definitions at the board level, as it is done for the
submitted PCIe controller [1].

[1] https://lore.kernel.org/20260727094726.890179-3-inochiama@xxxxxxxxx/

Fixes: 46380e4b1534 ("riscv: dts: spacemit: k3: add USB controller and USB phy support")
Cc: Inochi Amaoto <inochiama@xxxxxxxxx>
Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
arch/riscv/boot/dts/spacemit/k3.dtsi | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b084a35aa00e3..0a6f669d509a9 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -328,5 +328,7 @@ &usb3d_u2phy {
};

&usb3d {
+ phys = <&usb3d_u2phy>, <&combophy 4 PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
status = "okay";
};
diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
index c3f2dce0969c0..6f8d55eae6f6b 100644
--- a/arch/riscv/boot/dts/spacemit/k3.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
@@ -452,9 +452,6 @@ usb3d: usb@81a00000 {
<&syscon_apmu RESET_APMU_USB3_D_VCC>,
<&syscon_apmu RESET_APMU_USB3_D_PHY>;
reset-names = "ahb", "vcc", "phy";
- phys = <&usb3d_u2phy>,
- <&combophy 4 PHY_TYPE_USB3>;
- phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
--
2.53.0