Re: [PATCH 1/4] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Document RZ/G3L SoC

[Krzysztof Kozlowski]

On Tue, Aug 25, 2026 at 10:50:40AM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> 
> Extend the existing device tree bindings for Renesas RZ/G3S PCIe
> controller to include support for the RZ/G3L (renesas,r9a08g046-pcie)
> PCIe controller. The RZ/G3L PCIe controller is similar to RZ/G3S but has
> some key differences:
>      - Has 3 clocks compared to 2 on other SoCs.
>      - Has a different set of reset signals
> 
> Add device tree bindings for renesas,r9a08g046-pcie compatible IPs.
> 
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
>  .../bindings/pci/renesas,r9a08g045-pcie.yaml  | 33 ++++++++++++++++++-
>  1 file changed, 32 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
> index 09d78bd1a577..911b1976bf53 100644
> --- a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
> @@ -13,7 +13,7 @@ description: |
>    PCIe host controller found in Renesas RZ/G3S and similar SoCs complies
>    with PCIe Base Specification 4.0 and supports different link speeds
>    depending on the SoC variant:
> -    - Gen2 (5 GT/s): RZ/G3S
> +    - Gen2 (5 GT/s): RZ/G3{L,S}
>      - Gen3 (8 GT/s): RZ/G3E, RZ/V2H(P), RZ/V2N
>  
>  properties:
> @@ -21,6 +21,7 @@ properties:
>      oneOf:
>        - enum:
>            - renesas,r9a08g045-pcie # RZ/G3S
> +          - renesas,r9a08g046-pcie # RZ/G3L
>            - renesas,r9a09g047-pcie # RZ/G3E
>            - renesas,r9a09g057-pcie # RZ/V2H(P)
>        - items:
> @@ -87,14 +88,18 @@ properties:
>    interrupt-controller: true
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: System clock
>        - description: PM control clock or clock for L1 substate handling
> +      - description: PM control clock or clock for L1 substate handling

PMU? You list both clocks, but is there any different between them?

>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: aclk
>        - enum: [pm, pmu]
> +      - enum: [pm, pmu]

This should be "const: pmu" in such case.

Best regards,
Krzysztof