[PATCH v4 0/4] iio: accel: adxl367: add INT2 interrupt pin support

[Antoniu Miclaus]

The ADXL367 exposes two independent interrupt output pins, INT1 and INT2,
each with its own event mapping register. The driver has always hardcoded
INT1, so a board that routes only INT2 to the host never receives
interrupts. This series lets the driver pick the interrupt map register
based on the interrupt-names device tree property.

Changes in v4:
- Collected Reviewed-by tags from Marcelo Schmitt on patches 1 and 3.
- Reworked the interrupt-name lookup in the INT2 patch to propagate errors
  from fwnode_irq_get_byname(): only -EINVAL (no interrupt-names) and
  -ENODATA (requested name not listed) fall back to the INT1 default, so
  -EPROBE_DEFER and other real errors are no longer swallowed.

Antoniu Miclaus (4):
  dt-bindings: iio: update unreachable maintainer entries
  dt-bindings: iio: accel: adi,adxl367: add interrupt-names
  iio: accel: adxl367: use regmap_assign_bits()
  iio: accel: adxl367: add support for INT2 interrupt pin

 .../bindings/iio/accel/adi,adxl367.yaml       | 13 ++++-
 .../bindings/iio/adc/adi,ad4130.yaml          |  3 +-
 .../bindings/iio/addac/adi,ad74115.yaml       |  3 +-
 .../bindings/iio/addac/adi,ad74413r.yaml      |  3 +-
 MAINTAINERS                                   |  4 ++
 drivers/iio/accel/adxl367.c                   | 52 ++++++++++++++++---
 6 files changed, 65 insertions(+), 13 deletions(-)


base-commit: 350d1fb9204b13c5f95e511e98b8bcb47574d425
-- 
2.43.0