Re: [PATCH v5 05/20] iio: adc: Add AD7768 and AD7768-4 core support

From: Janani Sunil

Date: Mon Aug 31 2026 - 16:54:47 EST



On 8/31/26 11:04, Andy Shevchenko wrote:
On Fri, Aug 28, 2026 at 05:30:28PM +0200, Janani Sunil wrote:
Add core support for the AD7768 and AD7768-4 simultaneous sampling ADCs.
Configure supplies, clock and reset, use a custom regmap bus for the SPI
protocol, and parse the enabled channels and input buffer settings from
devicetree.

Connect the converter to an IIO backend for buffered capture with CRC,
provide a fixed safe wideband sampling configuration and add runtime
power management.
...

+ ret = regmap_update_bits(st->regmap, AD7768_REG_CH_MODE(0),
+ AD7768_CH_MODE_FILTER_TYPE_MSK |
+ AD7768_CH_MODE_DEC_RATE_MSK,
+ mode_config);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(st->regmap, AD7768_REG_CH_MODE_SEL, 0);
+ if (ret)
+ return ret;
+
+ dclk_div = 8 * st->datalines / st->chip_info->num_channels;
Does 8 represent BITS_PER_BYTE? Can BITS_TO_BYTES() be used?

8 is not BITS_PER_BYTE.
With fast mode (fMOD = MCLK / 4) and ×64 decimation, this gives: MCLK / DCLK = (4 × 64 / 32) × data lines / channels
Therefore, the factor is 8. I will add a comment explaining this.

Best Regards,
Jan