Re: [PATCH 1/2] dt-bindings: clock: qcom: nord-negcc: Add the secondary QUSB2 PHY reset

[Taniya Das]

On 9/1/2026 9:23 AM, Shawn Guo wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
> 
> The NE_GCC block has two eUSB2 PHY block resets - PRIM and SEC - but
> right now only the primary is registered. Add the secondary, which is
> required by the usb_1 eUSB2 PHY.
> 
> Note that the SoC has three eUSB2 PHYs but only these two QUSB2PHY
> resets: the HS-only USB20 tile has no dedicated QUSB2PHY reset and
> is instead reset as a whole via NE_GCC_USB20_PRIM_BCR.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
> Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>


Reviewed-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>

-- 
Thanks,
Taniya Das