[PATCH v2 0/5] Add support for USB phys in IPQ9650
From: Varadarajan Narayanan
Date: Tue Sep 01 2026 - 02:04:43 EST
This series
- Adds dt-bindings and driver changes for the high speed and super speed
phys in IPQ9650.
- IPQ9650 specific init tables to QMP super speed phy driver.
- The Femto high speed phy driver is refactored to accomodate differences
in the init sequences between SoCs first and then support for IPQ9650 is
included.
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
---
Changes in v2:
- Pick one R-b from Krzysztof
- Use qcom,ipq9650-usb-hs-phy directly instead of adding a 6nm compatible
and falling back to it
- Change pre/post to pre_tuning/post_tuning
- Use array count instead of terminating entries
- Fix value/mask mixup in 2 places
- Link to v1: https://lore.kernel.org/r/20260824-phy-v1-0-257d68a3210b@xxxxxxxxxxxxxxxx
---
Varadarajan Narayanan (5):
dt-bindings: phy: qcom,qmp-usb: Add IPQ9650 USB3 PHY
dt-bindings: phy: qcom,usb-snps-femto-v2: Add IPQ9650 compatible
phy: qcom: qmp-usb: Add IPQ9650 USB3 PHY configuration
phy: qcom: snps-femto-v2: Move PHY init registers to config tables
phy: qcom: snps-femto-v2: Add IPQ9650 support
.../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 2 +
.../bindings/phy/qcom,usb-snps-femto-v2.yaml | 2 +
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 118 +++++++++++++
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 188 +++++++++++++++------
4 files changed, 263 insertions(+), 47 deletions(-)
---
base-commit: c7507e07687010738e5f16926078f78ac0d6509d
change-id: 20260820-phy-664ed5ec0292
Best regards,
--
Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>