RE: [PATCH 09/10] arm64: dts: renesas: Add HiHope RZ/G2M v3.0 SoC main board support

[Ayman Chaudhry]

Hi Krzysztof,

Thanks for your review.

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Sent: Saturday, August 22, 2026 8:34 AM
> To: Ayman Chaudhry <ayman.chaudhry.kc@xxxxxxxxxxx>; Geert
> Uytterhoeven <geert+renesas@xxxxxxxxx>; magnus.damm
> <magnus.damm@xxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof
> Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>;
> Stephen Boyd <sboyd@xxxxxxxxxx>; Brian Masney
> <bmasney+clk@xxxxxxxxxx>; Jerome Brunet <jbrunet+clk@xxxxxxxxxxxx>;
> Ulf Hansson <ulfh@xxxxxxxxxx>
> Cc: linux-renesas-soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux-pm@xxxxxxxxxxxxxxx;
> Chris Paterson <Chris.Paterson2@xxxxxxxxxxx>; Biju Das
> <biju.das.jz@xxxxxxxxxxxxxx>; Fabrizio Castro
> <fabrizio.castro.jz@xxxxxxxxxxx>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH 09/10] arm64: dts: renesas: Add HiHope RZ/G2M v3.0
> SoC main board support
> 
> On 21/08/2026 17:03, Ayman Chaudhry wrote:
> > Add support for the HiHope RZ/G2M v3.0 (a.k.a. R8A774A3) SoC main
> > board.
> >
> > The RZ/G2M v3.0 SoC main board is similar to the RZ/G2M v1.3 SoC main
> > board, so there are already DTSI files available in the kernel. These
> > DTSI files will be included once additional support (e.g. I2C, GPIO
> > and sound) is added for the RZ/G2M v3.0 SoC.
> >
> > Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@xxxxxxxxxxx>
> > ---
> >  arch/arm64/boot/dts/renesas/Makefile          |  2 +
> >  .../dts/renesas/r8a774a3-hihope-rzg2m.dts     | 50 +++++++++++++++++++
> >  2 files changed, 52 insertions(+)
> >  create mode 100644
> > arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> >
> > diff --git a/arch/arm64/boot/dts/renesas/Makefile
> > b/arch/arm64/boot/dts/renesas/Makefile
> > index 8bf155badd11..6ae96027664d 100644
> > --- a/arch/arm64/boot/dts/renesas/Makefile
> > +++ b/arch/arm64/boot/dts/renesas/Makefile
> > @@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) +=
> > r8a774a1-hihope-rzg2m-rev2.dtb
> >  dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
> >  dtb-$(CONFIG_ARCH_R8A774A1) +=
> > r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
> >
> > +dtb-$(CONFIG_ARCH_R8A774A3) += r8a774a3-hihope-rzg2m.dtb
> > +
> >  dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-beacon-rzg2n-kit.dtb
> >  dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb
> >  dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb diff
> > --git a/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> > b/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> > new file mode 100644
> > index 000000000000..f51ba4fd602e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> > @@ -0,0 +1,50 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the HiHope RZ/G2M v3.0 SoC main board
> > + *
> > + *Copyright (C) 2026 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +#include "r8a774a3.dtsi"
> > +
> > +/ {
> > +	model = "HopeRun HiHope RZ/G2M v3.0 main board based on
> r8a774a3";
> > +	compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a3";
> > +
> > +	memory@48000000 {
> > +		device_type = "memory";
> > +		/* First 128MiB is reserved for secure area */
> > +		reg = <0x0 0x48000000 0x0 0x78000000>;
> > +	};
> > +
> > +	memory@600000000 {
> > +		device_type = "memory";
> > +		reg = <0x6 0x00000000 0x0 0x80000000>;
> > +	};
> > +
> > +	aliases {
> > +		serial0 = &scif2;
> > +	};
> > +
> > +	chosen {
> > +		bootargs = "ignore_loglevel";
> 
> Drop bootargs. Not a mainline DTS attribute. Why should my board ignore
> loglevel? How is it hardware description?
> 

Agreed, I will drop this in v2.

Kind Regards,
Ayman

> Best regards,
> Krzysztof