Re: [PATCH v2 0/3] pinctrl: airoha: add EcoNet EN7528 pin controller support

[Linus Walleij]

On Fri, Aug 28, 2026 at 5:35 PM Ahmed Naseef <naseefkm@xxxxxxxxx> wrote:

> The EcoNet EN7528 is a MIPS SoC that uses the same pin controller and GPIO
> IP as the Airoha SoCs, so it reuses the shared driver code introduced by
> the split into per-SoC drivers. Its register layout differs from every
> existing variant though: all IOMUX mode bits live in a single CHIP SCU
> register plus a few spill-over bits in IOMUX Control 3, EJTAG has its own
> enable register, and every pin configuration register is at a different
> offset than on EN7523.
>
> It also differs in a way the shared code did not model: only GPIO0-GPIO15
> are wired to the interrupt controller, while the driver assumed all
> AIROHA_NUM_PINS GPIOs could raise an interrupt. Patch 1 adds a
> num_irq_pins field to the per-SoC match data to describe that, bounds the
> interrupt callbacks and handler with it, and feeds it to gpiolib through
> gpio_irq_chip::init_valid_mask so gpiod_to_irq() fails up front for a pin
> that can never be an interrupt source. All existing SoCs pass
> AIROHA_NUM_PINS and are unaffected.
>
> Patch 2 documents the binding, patch 3 adds the driver.
>
> The series is based on linux-pinctrl/for-next, as it depends on the
> per-SoC driver split and on the CHIP SCU lookup by "airoha,chip-scu"
> phandle that landed there.
>
> Tested on a DASAN H660GM-A (EN7528, Airtel), booting OpenWrt.

Patches applied.

Ahmed, Benjamin: if you think there is something to Sashikos
hopless ramblings please simply follow up with fixes.

This is one of those cases where I definitely prefer to fix things
in-tree, Sashiko is hampering development with all it's comments.

Yours,
Linus Walleij