Re: [PATCH net-next 2/3] dt-bindings: net: Add UltraRISC DP1000 GMAC

From: Conor Dooley

Date: Tue Sep 01 2026 - 13:54:08 EST


On Tue, Sep 01, 2026 at 09:27:31AM +0800, Jia Wang wrote:
> The DP1000 integrates a Synopsys DesignWare GMAC from the 5.20 series with
> one MMIO register range, one clock and one interrupt.
>
> It also provides fixed TX and RX RGMII clock delays that cannot be
> disabled. Board connections must therefore not add either delay in PCB
> traces, making "rgmii-id" the only supported phy-mode.
>
> Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>

This seems fine, just squash in the other binding patch.
Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>

> ---
> .../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++
> MAINTAINERS | 5 ++
> 2 files changed, 79 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml
> new file mode 100644
> index 000000000000..13029302877b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/ultrarisc,dp1000-gmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UltraRISC DP1000 DWMAC Ethernet controller
> +
> +maintainers:
> + - Jia Wang <wangjia@xxxxxxxxxxxxx>
> +
> +description:
> + The DP1000 integrates a Synopsys DesignWare GMAC controller from the
> + 5.20 series. The SoC integration adds fixed RGMII TX and RX clock delays
> + which cannot be disabled. Consequently, a functional RGMII link requires
> + a PCB without TX or RX clock delays, represented by "rgmii-id".
> +
> +select:
> + properties:
> + compatible:
> + contains:
> + const: ultrarisc,dp1000-gmac
> + required:
> + - compatible
> +
> +properties:
> + compatible:
> + items:
> + - const: ultrarisc,dp1000-gmac
> + - const: snps,dwmac-5.20
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: stmmaceth
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + const: macirq
> +
> + phy-mode:
> + const: rgmii-id
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - phy-mode
> +
> +allOf:
> + - $ref: snps,dwmac.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet@38000000 {
> + compatible = "ultrarisc,dp1000-gmac", "snps,dwmac-5.20";
> + reg = <0x38000000 0x1000000>;
> + clocks = <&clk 0>;
> + clock-names = "stmmaceth";
> + interrupts = <84>;
> + interrupt-names = "macirq";
> + phy-mode = "rgmii-id";
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3a19da74d00c..3b96ff0734e6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -28004,6 +28004,11 @@ F: Documentation/devicetree/bindings/clock/ultrarisc,dp1000-clk.yaml
> F: drivers/clk/ultrarisc/*
> F: include/dt-bindings/clock/ultrarisc,dp1000-clk.h
>
> +ULTRARISC DP1000 DWMAC GLUE LAYER
> +M: Jia Wang <wangjia@xxxxxxxxxxxxx>
> +S: Maintained
> +F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml
> +
> ULTRARISC DP1000 PINCTRL DRIVER
> M: Jia Wang <wangjia@xxxxxxxxxxxxx>
> L: linux-gpio@xxxxxxxxxxxxxxx
>
> --
> 2.34.1
>

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