Re: [PATCH v10 05/12] cxl: Cache endpoint decoder settings during PCI enumeration

From: Srirangan Madhavan

Date: Tue Sep 01 2026 - 22:17:21 EST


On 8/4/26 7:28 PM, Alison Schofield wrote:
snip
diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c
snip
+void pci_cxl_hdm_init(struct pci_dev *pdev)
+{
+ int rc;
+
+ rc = __pci_cxl_hdm_init(pdev);
+ if (rc && rc != -ENOTTY && rc != -ENODEV)
+ pci_dbg(pdev, "CXL HDM cache init failed: %d\n", rc);
+}
Needs: EXPORT_SYMBOL_FOR_MODULES(pci_cxl_hdm_init, "cxl_core");

Without that the modular build fails, CONFIG_CXL_BUS=m
ERROR: modpost: "pci_cxl_hdm_init" [drivers/cxl/core/cxl_core.ko] undefined!

To catch this: build with CONFIG_CXL_BUS=m, not =y.
With =y, hdm.o and resource.o both land in vmlinux so the reference
resolves at link time and the missing export is invisible.

This failure masked the first one because modpost aborts before
Module.symvers is written, reads a stale Module.symvers and
make some erroneous complaints.

And, FWIW, with this and the mock Kbuild fixup in Patch 1, the
series passes the CXL unit tests.

-- Alison

Thank you. Fixed this in v11 by exporting pci_cxl_hdm_init() for cxl_core. I also tested with CONFIG_CXL_BUS=m and verified both make vmlinux modules and make M=tools/testing/cxl/ pass.

--
Regards,
Srirangan