Re: [PATCH v2 03/20] arm64: sysreg: Define OSLSR_EL1_OSLK_MASK

From: Marc Zyngier

Date: Wed Sep 02 2026 - 03:47:14 EST


On Tue, 01 Sep 2026 10:25:52 +0100,
Steffen Eiden <seiden@xxxxxxxxxxxxx> wrote:
>
> On Tue, Sep 01, 2026 at 08:51:04AM +0100, Marc Zyngier wrote:
> > On Mon, 31 Aug 2026 15:55:18 +0100,
> > Steffen Eiden <seiden@xxxxxxxxxxxxx> wrote:
> > >
> > > Define the missing mask for the OLSK field of OSLSR_EL1 which is
> > > required to safely write a value to that field.
> > >
> > > Signed-off-by: Steffen Eiden <seiden@xxxxxxxxxxxxx>
> > > ---
> > > arch/arm64/include/asm/sysreg.h | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > > index 1c5c4df260be..5a439853b721 100644
> > > --- a/arch/arm64/include/asm/sysreg.h
> > > +++ b/arch/arm64/include/asm/sysreg.h
> > > @@ -200,6 +200,7 @@
> > > #define OSLSR_EL1_OSLM_NI 0
> > > #define OSLSR_EL1_OSLM_IMPLEMENTED BIT(3)
> > > #define OSLSR_EL1_OSLK BIT(1)
> > > +#define OSLSR_EL1_OSLK_MASK BIT(1)
> >
> > Just move the required sysregs to the sysreg file, with the full bit
> > description. This will sort this once and for all.
>
> You mean to the tools/syreg file to generate the descriptions?
>
> I wanted to do that but OSLSR has a split field (OSLM in bit 3 and 0)
> which the generation tooling cannot handle. (right?)

Composite fields are nothing new. We have those everywhere (page
tables, for a start).

>
> Now that I am rethinking this:
>
> I could move the stuff to the tools/sysregs and in addtion define the
> OSLM field here manually but this time using the generated constansts.
> probably sth. like:
>
> #define OSLSR_EL1_OSLM_MASK (OSLSR_EL1_OSLM0_MASK | OSLSR_EL1_OSLM3_MASK)
> #define OSLSR_EL1_OSLM_NI OSLSR_EL1_OSLM0_NI
> #define OSLSR_EL1_OSLM_IMPLEMENTED OSLSR_EL1_OSLM3_IMPLEMENTED
>
> Shall I do this?

Yes. Except that OSLM3 should really be OSLM1, being bit 1 of the OSLM
field. And it would make a lot more sense to express NI and
IMPLEMENTED in terms of the two bits, just like the JSON describes it:

OSLSR_EL1 [2,0,1,1,4] MRS
# Reg cond: IsFeatureImplemented(FEAT_AA64)
Res0 63:4
UnsignedEnum 3 OSLM
UnsignedEnum 0 OSLM
0b00 VAL_00
0b10 VAL_10
EndEnum
UnsignedEnum 2 nTT
EndEnum
Field 1 OSLK

Thanks,

M.

--
Jazz isn't dead. It just smells funny.