Re: (subset) [PATCH v5 0/4] Add RZ/G3L PWRRDY power sequencing support

[Bartosz Golaszewski]

On Wed, 26 Aug 2026 13:27:22 +0100, Biju wrote:
> Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that signals power
> readiness for various IPs (USB, DSI, CSI, etc.) to their respective
> controllers. This register is part of the SYSC IP. Add a dedicated
> power sequencing driver to handle these signals.
> 
> This series is based on proposal for power sequence driver [1]
> for USB PWRRDY signal and DSI PWRRDY signal[2].
> 
> [...]

Applied, thanks!

[3/4] power: sequencing: Add Renesas RZ/G3L Power Ready driver
      https://git.kernel.org/brgl/c/3b04e9b8056e868c3e9a04cc74168c7c9a18746a

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>