[PATCH v3 08/10] clk: bd718x7: Support ROHM BD73800

From: Matti Vaittinen

Date: Wed Sep 02 2026 - 07:31:19 EST


From: Matti Vaittinen <mazziesaccount@xxxxxxxxx>

The ROHM BD73800 PMIC has a 32.768 kHz clock gate. Add support for
controlling this clock.

NOTE: The CLKOUT pin can be muxed by an OTP option. On some OTP
configurations the CLKOUT is not outputting the clk signal.

Signed-off-by: Matti Vaittinen <mazziesaccount@xxxxxxxxx>

---
Revision history:
v2 => v3:
- Use named initializers for platform_device_id
v1 => v2:
- No changes
---
drivers/clk/clk-bd718x7.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c
index 8ddb50c67757..1698b763bcb7 100644
--- a/drivers/clk/clk-bd718x7.c
+++ b/drivers/clk/clk-bd718x7.c
@@ -21,6 +21,9 @@
#define BD718XX_REG_OUT32K 0x2E
/* BD72720 */
#define BD72720_REG_OUT32K 0x9a
+/* BD73800 */
+#define BD73800_REG_OUT32K 0x50
+
/*
* BD71837, BD71847, and BD71828 all use bit [0] to clk output control
*/
@@ -123,6 +126,10 @@ static int bd71837_clk_probe(struct platform_device *pdev)
c->reg = BD72720_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
+ case ROHM_CHIP_TYPE_BD73800:
+ c->reg = BD73800_REG_OUT32K;
+ c->mask = CLK_OUT_EN_MASK;
+ break;
default:
dev_err(&pdev->dev, "Unknown clk chip\n");
return -EINVAL;
@@ -152,6 +159,7 @@ static const struct platform_device_id bd718x7_clk_id[] = {
{ .name = "bd71828-clk", .driver_data = ROHM_CHIP_TYPE_BD71828 },
{ .name = "bd71815-clk", .driver_data = ROHM_CHIP_TYPE_BD71815 },
{ .name = "bd72720-clk", .driver_data = ROHM_CHIP_TYPE_BD72720 },
+ { .name = "bd73800-clk", .driver_data = ROHM_CHIP_TYPE_BD73800 },
{ }
};
MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);
--
2.55.0

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